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Throughput of multi-core processors under thermal constraints

Published: 27 August 2007 Publication History

Abstract

We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a) the maximum number of cores that can be activated, with and without throttling, (b) the speedup (multi-core over single core), and the total power consumption, both as functions of the number of active cores. These expressions involve parameters like power per core, thermal resistance of hottest die block and package, and leakage dependence on temperature. We also computed the above metrics (a) and (b) numerically by solving the detailed Hotspot circuit of an multicore processor driven by a block-level exponential temperaturedependent leakage model. When compared to these numerical results, we found that the above expressions for (a) were at most 8% underpredicted, while those for (b) were accurately predicted. The proposed analytical approach is the first of its kind to relate metrics of interest in multi-core processors to high-level design parameters. Compared to numerical approaches, it provides much faster computation time, and valuable insight for processor designers.

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Cited By

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  • (2020)Accurate On-Chip Temperature Sensing for Multicore Processors Using Embedded Thermal SensorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.301283328:11(2328-2341)Online publication date: Nov-2020
  • (2020)Work-in-Progress: Towards a fine-grain thermal model for uniform multi-core processors2020 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS49844.2020.00049(403-406)Online publication date: Dec-2020
  • (2020)Regression Based Run-Time Thermal Estimation for Multi-core Processors2020 International Conference on Smart Electronics and Communication (ICOSEC)10.1109/ICOSEC49089.2020.9215267(1293-1300)Online publication date: Sep-2020
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cover image ACM Conferences
ISLPED '07: Proceedings of the 2007 international symposium on Low power electronics and design
August 2007
432 pages
ISBN:9781595937094
DOI:10.1145/1283780
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 27 August 2007

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Author Tags

  1. leakage dependence on temperature
  2. multi-core processors
  3. power
  4. speedup
  5. thermal management
  6. throughput

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

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  • (2020)Accurate On-Chip Temperature Sensing for Multicore Processors Using Embedded Thermal SensorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.301283328:11(2328-2341)Online publication date: Nov-2020
  • (2020)Work-in-Progress: Towards a fine-grain thermal model for uniform multi-core processors2020 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS49844.2020.00049(403-406)Online publication date: Dec-2020
  • (2020)Regression Based Run-Time Thermal Estimation for Multi-core Processors2020 International Conference on Smart Electronics and Communication (ICOSEC)10.1109/ICOSEC49089.2020.9215267(1293-1300)Online publication date: Sep-2020
  • (2019)Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.280124238:1(1-14)Online publication date: Jan-2019
  • (2019)A Novel Methodology to Improve Cooling Efficiency at Data CentersIEEE Access10.1109/ACCESS.2019.29463427(153799-153809)Online publication date: 2019
  • (2017)An Energy-Efficient Java Virtual MachineIEEE Transactions on Cloud Computing10.1109/TCC.2015.24813955:2(263-275)Online publication date: 1-Apr-2017
  • (2017)Microarchitecture-Level SoC DesignHandbook of Hardware/Software Codesign10.1007/978-94-017-7358-4_28-2(1-46)Online publication date: 11-Apr-2017
  • (2017)Microarchitecture-Level SoC DesignHandbook of Hardware/Software Codesign10.1007/978-94-017-7267-9_28(867-913)Online publication date: 27-Sep-2017
  • (2015)Thermal analysis of stochastic DVFS-enabled multicore real-time systemsThe Journal of Supercomputing10.1007/s11227-015-1562-171:12(4594-4622)Online publication date: 1-Dec-2015
  • (2014)Maximizing throughput of power/thermal-constrained processors by balancing power consumption of coresFifteenth International Symposium on Quality Electronic Design10.1109/ISQED.2014.6783386(633-638)Online publication date: Mar-2014
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