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Cell placement on graphics processing units

Published: 03 September 2007 Publication History

Abstract

Graphics Processing Units (GPUs) can be viewed as stream processors and, therefore, can be applied to improve the performance of data-parallel algorithms. GPUs can beat CPUs in most stream-like algorithms and have been successfully applied to solve problem in areas such as biology, audio and image processing, database queries and others. This paper presents a VLSI cell placement tool running on a GPU in order to show the viability of applying graphics hardware to improve the performance of CAD tools. Our results show that GPU versions of linear algebra algorithms run 3x or more faster than CPU versions.

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Cited By

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  • (2018)STP - A Quadratic VLSI Placement Tool Using Graphic Processing Units2018 17th International Symposium on Parallel and Distributed Computing (ISPDC)10.1109/ISPDC2018.2018.00020(77-84)Online publication date: Jun-2018
  • (2010)Efficient fault simulation on many-core processorsProceedings of the 47th Design Automation Conference10.1145/1837274.1837369(380-385)Online publication date: 13-Jun-2010
  • (2009)Parallel multi-level analytical global placement on graphics processing unitsProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687525(681-688)Online publication date: 2-Nov-2009

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cover image ACM Conferences
SBCCI '07: Proceedings of the 20th annual conference on Integrated circuits and systems design
September 2007
382 pages
ISBN:9781595938169
DOI:10.1145/1284480
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 September 2007

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Author Tags

  1. CAD
  2. GPGPU
  3. GPU
  4. cell placement
  5. quadratic placement
  6. stream processor

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SBCCI07
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SBCCI07: 20th Symposium on Integrated Circuits and System Design
September 3 - 6, 2007
Copacabana, Rio de Janeiro

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Overall Acceptance Rate 133 of 347 submissions, 38%

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Cited By

View all
  • (2018)STP - A Quadratic VLSI Placement Tool Using Graphic Processing Units2018 17th International Symposium on Parallel and Distributed Computing (ISPDC)10.1109/ISPDC2018.2018.00020(77-84)Online publication date: Jun-2018
  • (2010)Efficient fault simulation on many-core processorsProceedings of the 47th Design Automation Conference10.1145/1837274.1837369(380-385)Online publication date: 13-Jun-2010
  • (2009)Parallel multi-level analytical global placement on graphics processing unitsProceedings of the 2009 International Conference on Computer-Aided Design10.1145/1687399.1687525(681-688)Online publication date: 2-Nov-2009

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