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Accurate and fast system-level power modeling: An XScale-based case study

Published: 08 May 2008 Publication History

Abstract

Accurate and fast system modeling is central to the rapid design space exploration needed for embedded-system design. With fast, complex SoCs playing a central role in such systems, system designers have come to require MIPS-range simulation speeds and near-cycle accuracy. The sophisticated simulation frameworks that have been developed for high-speed system performance modeling do not address power consumption, although it is a key design constraint. In this paper, we define a simulation-based methodology for extending system performance modeling frameworks to also include power modeling. We demonstrate the use of this methodology with a case study of a real, complex embedded system, comprising the Intel XScale embedded microprocessor, its WMMX SIMD co processor, L1 caches, SDRAM, and the on-board address and data buses. We describe detailed power models for each of these components and validate them against physical measurements from hardware, demonstrating that such frameworks enable designers to model both power and performance at high speeds without sacrificing accuracy. Our results indicate that the power estimates obtained are accurate within 5% of physical measurements from hardware, while simulation speeds consistently exceed a million instructions per second (MIPS).

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      cover image ACM Transactions on Embedded Computing Systems
      ACM Transactions on Embedded Computing Systems  Volume 7, Issue 3
      April 2008
      437 pages
      ISSN:1539-9087
      EISSN:1558-3465
      DOI:10.1145/1347375
      Issue’s Table of Contents
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 08 May 2008
      Accepted: 01 April 2006
      Revised: 01 February 2006
      Received: 01 November 2005
      Published in TECS Volume 7, Issue 3

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      Author Tags

      1. Power modeling
      2. SystemC
      3. embedded systems

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      • (2022)High-level power estimation techniques in embedded systems hardware: an overviewThe Journal of Supercomputing10.1007/s11227-022-04798-579:4(3771-3790)Online publication date: 8-Sep-2022
      • (2020)Transaction Level Energy Modeling of Polyhedral Process Networks2020 XXIX International Scientific Conference Electronics (ET)10.1109/ET50336.2020.9238275(1-4)Online publication date: 16-Sep-2020
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