Fpga-based hardware/software co-design for chirplet signal decomposition

In various signal processing applications, decomposition and analysis of non-stationary signals is a challenging problem. In this work, we present a computationally efficient method, fast chirplet signal decomposition (FCSD) algorithm, for decomposing highly convoluted signals into a linear expansion of chirplets, and successively estimates the chirplet parameters. These parameters are capable of representing a broad range of echo shapes, including the broad-band, narrow-band, symmetric, skewed, nondispersive or dispersive, and have significant physical interpretations for radar, sonar, and ultrasonic imaging applications. For the real-time implementation of chirplet signal decomposition algorithm, an FPGA-based hardware/software co-design is developed on Xilinx Virtex II Pro FPGA platform. In this study, based on the balance among the system constraints, cost, and the efficiency of estimations, the performance of different algorithm implementation schemes have been explored. The developed system successfully exhibits the robustness in the chirplet signal decomposition of experimental signals. This type of study addresses a broad range of applications including velocity measurement, target detection, deconvolution, object classification, data compression, and pattern recognition.