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Functionally linear decomposition and synthesis of logic circuits for FPGAs

Published: 08 June 2008 Publication History

Abstract

This paper presents a novel logic synthesis method to reduce the area of XOR-based logic functions. The idea behind the synthesis method is to exploit linear dependency between logic sub-functions to create an implementation based on an XOR relationship with a lower area overhead. Experiments conducted on a set of 99 MCNC benchmark (25 XOR based, 74 non-XOR) circuits show that this approach provides an average of 18.8% area reduction as compared to BDS-PGA 2.0 and 25% area reduction as compared to ABC for XOR-based logic circuits.

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Cited By

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  • (2011)Logic synthesis for integrated opticsProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973013(13-18)Online publication date: 2-May-2011
  • (2010)Synthesizing complementary circuits automaticallyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2010.204915229:8(1191-1202)Online publication date: 1-Aug-2010
  • (2008)Functionally Linear Decomposition and Synthesis of Logic Circuits for FPGAsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2008.200614427:12(2236-2249)Online publication date: 1-Dec-2008
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    cover image ACM Conferences
    DAC '08: Proceedings of the 45th annual Design Automation Conference
    June 2008
    993 pages
    ISBN:9781605581156
    DOI:10.1145/1391469
    • General Chair:
    • Limor Fix
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 08 June 2008

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    Author Tags

    1. Gaussian elimination
    2. decomposition
    3. linearity
    4. logic synthesis

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    View all
    • (2011)Logic synthesis for integrated opticsProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973013(13-18)Online publication date: 2-May-2011
    • (2010)Synthesizing complementary circuits automaticallyIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2010.204915229:8(1191-1202)Online publication date: 1-Aug-2010
    • (2008)Functionally Linear Decomposition and Synthesis of Logic Circuits for FPGAsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2008.200614427:12(2236-2249)Online publication date: 1-Dec-2008
    • (2008)Fast toggle rate computation for FPGA circuits2008 International Conference on Field Programmable Logic and Applications10.1109/FPL.2008.4629909(65-70)Online publication date: Sep-2008

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