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DeFer: deferred decision making enabled fixed-outline floorplanner

Published: 08 June 2008 Publication History

Abstract

In this paper, we present DeFer --- a fast, high-quality and nonstochastic fixed-outline floorplanning algorithm. DeFer generates a non-slicing floorplan by compacting a slicing floorplan. To find a good slicing floorplan, instead of searching through numerous slicing trees by simulated annealing as in traditional approaches, DeFer considers only one single slicing tree. However, we generalize the notion of slicing tree based on the principle of Deferred Decision Making (DDM). When two subfloorplans are combined at each node of the generalized slicing tree, DeFer does not specify their orientations, the left-right/top-bottom order between them, and the slice line direction. DeFer even does not specify the slicing tree structures for small subfloorplans. In other words, we are deferring the decisions on these factors, which are specified arbitrarily at an early step in traditional approaches. Because of DDM, one slicing tree actually corresponds to a huge number of slicing floorplan solutions, all of which are efficiently kept in one single shape curve. With the final shape curve, it is straightforward to choose a good floorplan fitting into the fixed outline. Several techniques are also proposed to further optimize the wirelength. Experimental results on benchmarks with only hard blocks and with both hard and soft blocks show that DeFer achieves the best success rate, the best wirelength and the best runtime on average compared with other state-of-the-art floorplanners.

References

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    cover image ACM Conferences
    DAC '08: Proceedings of the 45th annual Design Automation Conference
    June 2008
    993 pages
    ISBN:9781605581156
    DOI:10.1145/1391469
    • General Chair:
    • Limor Fix
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 08 June 2008

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    Author Tags

    1. deferred decision making
    2. fixed outline
    3. floorplanning

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    • (2024) Hier-RTLMP : A Hierarchical Automatic Macro Placer for Large-Scale Complex IP Blocks IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.334628443:5(1552-1565)Online publication date: May-2024
    • (2023)AutoDMPProceedings of the 2023 International Symposium on Physical Design10.1145/3569052.3578923(149-157)Online publication date: 26-Mar-2023
    • (2023)ISP: An Improved Slicing Pair Code for Skewed Slicing Floorplan2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID)10.1109/VLSID57277.2023.00051(205-210)Online publication date: Jan-2023
    • (2022)RTL-MPProceedings of the 2022 International Symposium on Physical Design10.1145/3505170.3506731(3-11)Online publication date: 13-Apr-2022
    • (2022)Chip PlanningVLSI Physical Design: From Graph Partitioning to Timing Closure10.1007/978-3-030-96415-3_3(53-93)Online publication date: 15-Jun-2022
    • (2021)Advancing PlacementProceedings of the 2021 International Symposium on Physical Design10.1145/3439706.3446884(15-22)Online publication date: 22-Mar-2021
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    • (2015)GlYFF: A framework for global yield and floorplan aware design optimizationSixteenth International Symposium on Quality Electronic Design10.1109/ISQED.2015.7085401(70-76)Online publication date: Mar-2015
    • (2012)Line search-based inverse lithography technique for mask designVLSI Design10.1155/2012/5891282012(1-1)Online publication date: 1-Jan-2012
    • (2012)GDRouterProceedings of the 49th Annual Design Automation Conference10.1145/2228360.2228469(597-602)Online publication date: 3-Jun-2012
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