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Partial order reduction for scalable testing of systemC TLM designs

Published: 08 June 2008 Publication History

Abstract

A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is non-deterministic. To leverage testing of a SystemC TLM design, we focus on automatically exploring all possible behaviors of the design for a given data input. We combine static and dynamic partial order reduction techniques with SystemC semantics to intelligently explore a subset of the possible traces, while still being provably sufficient for detecting deadlocks and safety property violations. We have implemented our exploration algorithm in a framework called Satya and have applied it to a variety of examples including the TAC benchmark. Using Satya, we automatically found an assertion violation in a benchmark distributed as a part of the OSCI repository.

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Cited By

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  • (2023)Formale Verifikation von SystemC-basierten Entwürfen durch symbolische SimulationVerbessertes virtuelles Prototyping10.1007/978-3-031-18174-0_4(63-125)Online publication date: 1-Jan-2023
  • (2021)Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challengesScience China Information Sciences10.1007/s11432-020-3308-465:1Online publication date: 23-Dec-2021
  • (2020)Optimized Hardware/Software Co-Verification using the UCLID Satisfiability Modulo Theory Solver2020 IEEE 29th International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE)10.1109/WETICE49692.2020.00051(225-230)Online publication date: Sep-2020
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    cover image ACM Conferences
    DAC '08: Proceedings of the 45th annual Design Automation Conference
    June 2008
    993 pages
    ISBN:9781605581156
    DOI:10.1145/1391469
    • General Chair:
    • Limor Fix
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 08 June 2008

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    Author Tags

    1. partial-order reduction
    2. simulation
    3. testing
    4. verification

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    View all
    • (2023)Formale Verifikation von SystemC-basierten Entwürfen durch symbolische SimulationVerbessertes virtuelles Prototyping10.1007/978-3-031-18174-0_4(63-125)Online publication date: 1-Jan-2023
    • (2021)Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challengesScience China Information Sciences10.1007/s11432-020-3308-465:1Online publication date: 23-Dec-2021
    • (2020)Optimized Hardware/Software Co-Verification using the UCLID Satisfiability Modulo Theory Solver2020 IEEE 29th International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE)10.1109/WETICE49692.2020.00051(225-230)Online publication date: Sep-2020
    • (2019)Verifying SystemC Using Intermediate Verification Language and Stateful Symbolic SimulationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.284663838:7(1359-1372)Online publication date: Jul-2019
    • (2016)Formal Verification of SystemC-based Cyber ComponentsIndustrial Internet of Things10.1007/978-3-319-42559-7_6(137-167)Online publication date: 13-Oct-2016
    • (2015)Hybrid Dynamic Data Race Detection in SystemCLanguages, Design Methods, and Tools for Electronic System Design10.1007/978-3-319-24457-0_3(41-54)Online publication date: 12-Dec-2015
    • (2014)Towards verifying determinism of SystemC designsProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2616794(1-4)Online publication date: 24-Mar-2014
    • (2014)Analysis of Permanent Faults in Transaction Level SystemC ModelsProceedings of the 2014 IEEE 34th International Conference on Distributed Computing Systems Workshops10.1109/ICDCSW.2014.33(154-160)Online publication date: 30-Jun-2014
    • (2014)Hybrid dynamic data race detection in systemCProceedings of the 2014 Forum on Specification and Design Languages (FDL)10.1109/FDL.2014.7119347(1-6)Online publication date: Oct-2014
    • (2013)Conquering the scheduling alternative explosion problem of SystemC symbolic simulationProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561961(685-690)Online publication date: 18-Nov-2013
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