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A secure and low-energy logic style using charge recovery approach

Published: 11 August 2008 Publication History

Abstract

The charge recovery logic families have been designed several years ago not in order to eliminate the side-channel leakage but to reduce the power consumption. However, in this article we present a new charge recovery logic style not only to gain high energy efficiency but also to achieve the resistance against side-channel attacks especially against differential power analysis attacks. Our approach is a modified version of a classical charge recovery logic style namely 2N-2N2P. Simulation results show a significant improvement in DPA-resistance level as well as in power consumption reduction in comparison with 2N-2N2P and other DPA-resistant logic styles.

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  • (2021)3-Phase Adiabatic Logic and its Sound SCA EvaluationIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2020.29767119:4(2175-2188)Online publication date: 1-Oct-2021
  • (2021)DGFinSAL: A New Low Power Adiabatic FinFET-Based Logic Family for DPA-Resistant ApplicationsCircuits, Systems, and Signal Processing10.1007/s00034-021-01696-8Online publication date: 27-Mar-2021
  • (2020)A Comparative Study of Joint Power and Reliability Management Techniques in Multicore Embedded Systems2020 CSI/CPSSI International Symposium on Real-Time and Embedded Systems and Technologies (RTEST)10.1109/RTEST49666.2020.9140137(1-8)Online publication date: Jun-2020
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    cover image ACM Conferences
    ISLPED '08: Proceedings of the 2008 international symposium on Low Power Electronics & Design
    August 2008
    396 pages
    ISBN:9781605581095
    DOI:10.1145/1393921
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 11 August 2008

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    Author Tags

    1. cell level DPA-countermeasure
    2. charge recovery logic
    3. differential power analysis
    4. side-channel attack

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    Cited By

    View all
    • (2021)3-Phase Adiabatic Logic and its Sound SCA EvaluationIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2020.29767119:4(2175-2188)Online publication date: 1-Oct-2021
    • (2021)DGFinSAL: A New Low Power Adiabatic FinFET-Based Logic Family for DPA-Resistant ApplicationsCircuits, Systems, and Signal Processing10.1007/s00034-021-01696-8Online publication date: 27-Mar-2021
    • (2020)A Comparative Study of Joint Power and Reliability Management Techniques in Multicore Embedded Systems2020 CSI/CPSSI International Symposium on Real-Time and Embedded Systems and Technologies (RTEST)10.1109/RTEST49666.2020.9140137(1-8)Online publication date: Jun-2020
    • (2017)Hardware Designs for Security in Ultra-Low-Power IoT Systems: An Overview and SurveyIEEE Micro10.1109/MM.2017.424135737:6(72-89)Online publication date: Nov-2017
    • (2014)Sense Amplifier Pass Transistor Logic for energy efficient and DPA-resistant AES circuitFifteenth International Symposium on Quality Electronic Design10.1109/ISQED.2014.6783370(517-522)Online publication date: Mar-2014
    • (2013)An energy recovery logic level countermeasure for power analysis attacks on AESINTERNATIONAL CONFERENCE ON SMART STRUCTURES AND SYSTEMS - ICSSS'1310.1109/ICSSS.2013.6623020(164-170)Online publication date: Mar-2013
    • (2012)LRCGProceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/2380445.2380515(453-462)Online publication date: 7-Oct-2012
    • (2012)HDRLIEEE Embedded Systems Letters10.1109/LES.2012.21931154:3(57-60)Online publication date: 1-Sep-2012
    • (2011)A low power secure logic style to counteract differential power analysis attacksProceedings of 2011 International Symposium on VLSI Design, Automation and Test10.1109/VDAT.2011.5783557(1-4)Online publication date: Apr-2011
    • (2010)Lightweight cryptography and DPA countermeasuresProceedings of the 14th international conference on Financial cryptograpy and data security10.5555/1894863.1894870(68-79)Online publication date: 25-Jan-2010
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