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Design of low-power short-distance opto-electronic transceiver front-ends with scalable supply voltages and frequencies

Published: 11 August 2008 Publication History

Abstract

The need for low-power I/Os is widely recognized, as I/Os take up a significant portion of total chip power. In recent years, researchers have pointed to the potential system-level power savings that can be realized if dynamic voltage scalable I/Os are available. However, substantial challenges remain in building such links. This paper presents the design and implementation details of opto-electronic transceiver front-end blocks where supply voltage can scale from 1.2V to 0.6V with almost linearly scalable bandwidth from 8Gb/s to 4Gb/s, and power consumption from 36mW to 5mW in a 130nm CMOS process. To the best of our knowledge, this is the first circuit demonstration of voltage-scalable optical links. It demonstrates the feasibility of dynamic voltage scalable optical I/Os.

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  • (2021)Ultra‐low power TIA with variable bandwidth in 0.13 μm CMOS for short‐range optical interconnectsThe Journal of Engineering10.1049/tje2.120342021:5(295-300)Online publication date: 6-Apr-2021
  • (2020)Supply-Scalable High-Speed I/O InterfacesElectronics10.3390/electronics90813159:8(1315)Online publication date: 15-Aug-2020
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  1. Design of low-power short-distance opto-electronic transceiver front-ends with scalable supply voltages and frequencies

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    cover image ACM Conferences
    ISLPED '08: Proceedings of the 2008 international symposium on Low Power Electronics & Design
    August 2008
    396 pages
    ISBN:9781605581095
    DOI:10.1145/1393921
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 11 August 2008

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    Author Tags

    1. dynamic voltage and frequency scaling
    2. interconnection networks
    3. optical transceiver
    4. voltage-controlled inductive load

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    Cited By

    View all
    • (2021)A 1.93-pJ/Bit PCI Express Gen4 PHY Transmitter with On-Chip Supply Regulators in 28 nm CMOSElectronics10.3390/electronics1001006810:1(68)Online publication date: 2-Jan-2021
    • (2021)Ultra‐low power TIA with variable bandwidth in 0.13 μm CMOS for short‐range optical interconnectsThe Journal of Engineering10.1049/tje2.120342021:5(295-300)Online publication date: 6-Apr-2021
    • (2020)Supply-Scalable High-Speed I/O InterfacesElectronics10.3390/electronics90813159:8(1315)Online publication date: 15-Aug-2020
    • (2011)Energy Efficiency of Electronic and Optical Network ElementsIEEE Journal of Selected Topics in Quantum Electronics10.1109/JSTQE.2010.206655117:2(296-308)Online publication date: Mar-2011
    • (2011)Energy-Efficient and Bandwidth-Reconfigurable Photonic Networks for High-Performance Computing (HPC) SystemsIEEE Journal of Selected Topics in Quantum Electronics10.1109/JSTQE.2010.205141917:2(384-395)Online publication date: Mar-2011
    • (2011)2.5 Gb/s CMOS preamplifier for low-cost fiber-optic receiversAnalog Integrated Circuits and Signal Processing10.1007/s10470-010-9526-066:3(363-370)Online publication date: 1-Mar-2011
    • (2010)A 24mW, 5Gb/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18.MU.m CMOS technologyIEICE Electronics Express10.1587/elex.7.3087:4(308-313)Online publication date: 2010

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