research-article

Investigating the effects of fine-grain three-dimensional integration on microarchitecture design

Authors:

Jason CongAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 4, Issue 4

Article No.: 17, Pages 1 - 30

https://doi.org/10.1145/1412587.1412590

Published: 07 November 2008 Publication History

Abstract

In this article we propose techniques that enable efficient exploration of the 3D design space, where each logical block can span more than one silicon layer. Fine-grain 3D integration provides reduced intrablock wire delay as well as improved power consumption. However, the corresponding power and performance advantage is usually underutilized, since various implementations of multilayer blocks require novel physical design and microarchitecture infrastructure to explore 3D microarchitecture design space. We develop a cubic packing engine which can simultaneously optimize physical and architectural design for efficient vertical integration. This technique selects the individual unit designs from a set of single-layer or multilayer implementations to get the best microarchitectural design in terms of performance, temperature, or both. Our experimental results using a design driver of a high-performance superscalar processor show a 36% performance improvement over traditional 2D for 2--4 layers and 14% over 3D with single-layer unit implementations. Since thermal characteristics of 3D integrated circuits are among the main challenges, thermal-aware floorplanning and thermal via insertion techniques are employed to keep the peak temperatures below threshold.

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Cited By

Knechtel JLienig JYoung EOzdal M(2016)Physical Design Automation for 3D Chip StacksProceedings of the 2016 on International Symposium on Physical Design10.1145/2872334.2872335(3-10)Online publication date: 3-Apr-2016
https://dl.acm.org/doi/10.1145/2872334.2872335
Kursun EWakil JFarooq MHannon R(2012)Spatial and temporal thermal characterization of stacked multicore architecturesACM Journal on Emerging Technologies in Computing Systems10.1145/2287696.22877048:3(1-17)Online publication date: 15-Aug-2012
https://dl.acm.org/doi/10.1145/2287696.2287704
Thorolfsson TLipa SFranzon P(2012)A 10.35 mW/GFlop stacked SAR DSP unit using fine-grain partitioned 3D integrationProceedings of the IEEE 2012 Custom Integrated Circuits Conference10.1109/CICC.2012.6330589(1-4)Online publication date: Sep-2012
https://doi.org/10.1109/CICC.2012.6330589
Show More Cited By

Index Terms

Investigating the effects of fine-grain three-dimensional integration on microarchitecture design
1. Computer systems organization
  1. Architectures
2. Hardware
  1. Integrated circuits

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 4, Issue 4

October 2008

123 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/1412587

Issue’s Table of Contents

Copyright © 2008 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 07 November 2008

Accepted: 01 May 2008

Revised: 01 May 2008

Received: 01 December 2007

Published in JETC Volume 4, Issue 4

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Cited By

Knechtel JLienig JYoung EOzdal M(2016)Physical Design Automation for 3D Chip StacksProceedings of the 2016 on International Symposium on Physical Design10.1145/2872334.2872335(3-10)Online publication date: 3-Apr-2016
https://dl.acm.org/doi/10.1145/2872334.2872335
Kursun EWakil JFarooq MHannon R(2012)Spatial and temporal thermal characterization of stacked multicore architecturesACM Journal on Emerging Technologies in Computing Systems10.1145/2287696.22877048:3(1-17)Online publication date: 15-Aug-2012
https://dl.acm.org/doi/10.1145/2287696.2287704
Thorolfsson TLipa SFranzon P(2012)A 10.35 mW/GFlop stacked SAR DSP unit using fine-grain partitioned 3D integrationProceedings of the IEEE 2012 Custom Integrated Circuits Conference10.1109/CICC.2012.6330589(1-4)Online publication date: Sep-2012
https://doi.org/10.1109/CICC.2012.6330589
Sun GChen YDong XOuyang JXie Y(2011)Three-dimensional Integrated CircuitsFoundations and Trends in Electronic Design Automation10.1561/10000000165:1–2(1-151)Online publication date: 1-Jan-2011
https://dl.acm.org/doi/10.1561/1000000016
Nandakumar VMarek-Sadowska MStok LDutt NHassoun S(2011)Layout effects in fine grain 3D integrated regular microprocessor blocksProceedings of the 48th Design Automation Conference10.1145/2024724.2024871(639-644)Online publication date: 5-Jun-2011
https://dl.acm.org/doi/10.1145/2024724.2024871
Nain RChrzanowska-Jeske M(2011)Fast Placement-Aware 3-D Floorplanning Using Vertical Constraints on Sequence PairsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2010.205524719:9(1667-1680)Online publication date: 1-Sep-2011
https://dl.acm.org/doi/10.1109/TVLSI.2010.2055247
Kursun EWakil JIyengar M(2010)Analysis of spatial and temporal behavior of threedimensional multi-core architectures towards run-time thermal management2010 12th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems10.1109/ITHERM.2010.5501257(1-8)Online publication date: Jun-2010
https://doi.org/10.1109/ITHERM.2010.5501257

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