Shogo Matsui
Abstract
DYNAMIC REFRESH METHOD, a new method of refreshing dynamic RAMs is proposed that may result in a significant reduction in the frequency of refresh. The method is based on a fact that a row of the memory cells array in dynamic RAM is normally refreshed whenever a normal access is made. The method is described as a periodic operation with 1/n intervals of the ordinary method. The number of rows refreshed in one cycle varies dynamically. A definition and an implementation of the method are introduced first, the improvement in frequency of refresh is analyzed, and an application example is given.
- [1] Langdon, G. Dynamic random-access memory refresh method and means. IBM Tech. Disclosure Bull., 22, 4, pp. 1636 (Sept. 1978).Google Scholar
- [2] Dvorak, T. Transparent refresh of dynamic random-access memories. IBM Tech. Disclosure Bull., 23, 7B, pp. 3201-3202 (Dec. 1980).Google Scholar
- [3] Matsui, S. Dynamic Referesh Method for Dynamic Random Access Memories. The Transactions of the Institute of Electronics, Information and Communication Engineers, Section D-1, J72-D-1, 3, pp. 175-181 (Mar. 1989) (In Japanese).Google Scholar
Index Terms
- Dynamic refresh method for dynamic RAMs
Recommendations
Versatile refresh: low complexity refresh scheduling for high-throughput multi-banked eDRAM
Performance evaluation reviewMulti-banked embedded DRAM (eDRAM) has become increasingly popular in high-performance systems. However, the data retention problem of eDRAM is exacerbated by the larger number of banks and the high-performance environment in which it is deployed: The ...
Versatile refresh: low complexity refresh scheduling for high-throughput multi-banked eDRAM
SIGMETRICS '12: Proceedings of the 12th ACM SIGMETRICS/PERFORMANCE joint international conference on Measurement and Modeling of Computer SystemsMulti-banked embedded DRAM (eDRAM) has become increasingly popular in high-performance systems. However, the data retention problem of eDRAM is exacerbated by the larger number of banks and the high-performance environment in which it is deployed: The ...
Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs
MICRO 40: Proceedings of the 40th Annual IEEE/ACM International Symposium on MicroarchitectureDRAMs require periodic refresh for preserving data stored in them. The refresh interval for DRAMs depends on the vendor and the de- sign technology they use. For each refresh in a DRAM row, the stored information in each cell is read out and then ...
Comments