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ASPLOS V: Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
ACM1992 Proceeding
Publisher:
  • Association for Computing Machinery
  • New York
  • NY
  • United States
Conference:
ASPLOS92: 5th Conference on Architectural Support of Programming Languages & Operating Systems Boston Massachusetts USA October 12 - 15, 1992
ISBN:
978-0-89791-534-2
Published:
01 September 1992
Sponsors:
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Software support for speculative loads
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Efficient data breakpoints
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Fast mutual exclusion for uniprocessors

In this paper we describe restartable atomic sequences, an optimistic mechanism for implementing simple atomic operations (such as Test-And-Set) on a uniprocessor. A thread that is suspended within a restartable atomic sequence is resumed by the ...

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Sentinel scheduling for VLIW and superscalar processors

Speculative execution is an important source of parallelism for VLIW and superscalar processors. A serious challenge with compiler-controlled speculative execution is to accurately detect and report all program execution errors at the time of ...

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Efficient superscalar performance through boosting

The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that speculative execution is required for high instruction per cycle (IPC) rates ...

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Cooperative shared memory: software and hardware for scalable multiprocessor

We believe the absence of massively-parallel, shared-memory machines follows from the lack of a shared-memory programming performance model that can inform programmers of the cost of operations (so they can avoid expensive ones) and can tell hardware ...

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Closing the window of vulnerability in multiphase memory transactions

Multiprocessor architects have begun to explore several mechanisms such as prefetching, context-switching and software-assisted dynamic cache-coherence, which transform single-phase memory transactions in conventional memory systems into multiphase ...

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Access normalization: loop restructuring for NUMA compilers

In scalable parallel machines, processors can make local memory accesses much faster than they can make remote memory accesses. In addition, when a number of remote accesses must be made, it is usually more efficient to use block transfers of data ...

Contributors
  • Nokia Bell Labs

Index Terms

  1. Proceedings of the fifth international conference on Architectural support for programming languages and operating systems

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      Acceptance Rates

      Overall Acceptance Rate 535 of 2,713 submissions, 20%
      YearSubmittedAcceptedRate
      ASPLOS '193517421%
      ASPLOS '183195618%
      ASPLOS '173205317%
      ASPLOS '162325323%
      ASPLOS '152874817%
      ASPLOS '142174923%
      ASPLOS XV1813218%
      ASPLOS XIII1273124%
      ASPLOS XII1583824%
      ASPLOS X1752414%
      ASPLOS IX1142421%
      ASPLOS VIII1232823%
      ASPLOS VII1092523%
      Overall2,71353520%