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Performance debugging of Esterel specifications

Published: 19 October 2008 Publication History

Abstract

Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based on the underlying "synchrony hypothesis", where the computation/communication associated with the processing of all events occurring within the same "clock tick" are assumed to happen instantaneously (or in zero time). In reality, Esterel specifications get compiled to implementations (such as C code) which do not satisfy the perfect synchrony assumption. Hence, platform-specific timing analysis of such implementations is an important research topic. Interest in this area has lately been renewed with the recent advances in Worst-case Execution Time (WCET)analysis techniques. In this paper we perform WCET analysis on sequential C code and exploit the structure of the code generated from Esterel specifications to obtain tight WCET estimates. Such estimates can validate Esterel-level assumptions on the instantaneous processing of signals or events that occur together. More importantly, they can be used to identify parts of the specification which might pose as timing/performance bottlenecks with respect to the underlying platform. This is done by exploiting traceability links between Esterel specifications and the generated C code, which map the time-critical computations at the C-level back to the Esterel-level. This not only allows a designer to optimize or simplify Esterel specifications, but also choose/configure suitable implementation platforms. We show the results of our WCET analysis on a set of standard Esterel benchmarks and illustrate the utility of our model-code traceability technique using an Esterel specification of a reflex game application.

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      cover image ACM Conferences
      CODES+ISSS '08: Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
      October 2008
      288 pages
      ISBN:9781605584706
      DOI:10.1145/1450135
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      Published: 19 October 2008

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      Author Tags

      1. Esterel
      2. WCET analysis
      3. synchronous programming

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      ESWEEK 08
      ESWEEK 08: Fourth Embedded Systems Week
      October 19 - 24, 2008
      GA, Atlanta, USA

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      CODES+ISSS '08 Paper Acceptance Rate 44 of 143 submissions, 31%;
      Overall Acceptance Rate 280 of 864 submissions, 32%

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      • (2024)Introduction to the Special Issue on Automotive CPS Safety & Security: Part 2ACM Transactions on Cyber-Physical Systems10.1145/36502108:2(1-17)Online publication date: 8-Mar-2024
      • (2023)Autonomy-driven Emerging Directions in Software-defined Vehicles2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE56975.2023.10136910(1-6)Online publication date: Apr-2023
      • (2023)Introduction to the Special Issue on Automotive CPS Safety & Security: Part 1ACM Transactions on Cyber-Physical Systems10.1145/35799867:1(1-6)Online publication date: 22-Mar-2023
      • (2020)Predictable Vision for Autonomous Systems2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC)10.1109/ISORC49007.2020.00025(116-123)Online publication date: May-2020
      • (2016)Time for Reactive System ModelingProceedings of the 24th International Conference on Real-Time Networks and Systems10.1145/2997465.2997467(289-298)Online publication date: 19-Oct-2016
      • (2015)Timing analysis enhancement for synchronous programReal-Time Systems10.1007/s11241-015-9219-y51:2(192-220)Online publication date: 1-Mar-2015
      • (2014)Building timing predictable embedded systemsACM Transactions on Embedded Computing Systems10.1145/256003313:4(1-37)Online publication date: 10-Mar-2014
      • (2014)Introduction to Synchronous Programming Using EsterelModel-Driven Design Using IEC 6149910.1007/978-3-319-10521-5_3(35-64)Online publication date: 8-Oct-2014
      • (2013)ILPcProceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems10.5555/2555729.2555749(1-10)Online publication date: 29-Sep-2013
      • (2013)Timing analysis enhancement for synchronous programProceedings of the 21st International conference on Real-Time Networks and Systems10.1145/2516821.2516841(141-150)Online publication date: 16-Oct-2013
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