ABSTRACT
A novel approach to arithmetic operations in digital computers is described which requires fewer stages of logic and fewer components than conventional adder circuitry. This is accomplished by using the decimal digits in an arithmetic field to complete memory addresses which in turn are used to reference a set of answers prestored in magnetic core storage. Multiple non-contiguous memory addresses stored in the machine hardware then reference the various digit positions of the sum, difference, or partial product at the proper time in the arithmetic cycle to develop the result. The accuracy of all results is easily verified by simply performing an automatic validity check on the data paths within the computer system.
The machine operator need not concern himself with the "hardware" method used within the computer, since the arithmetic commands commonly found in digital computers (Add, Subtract, etc.) are available in the instruction set for the system shown; table lookup circuitry does the work.
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