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An associative processor for air traffic control

Published: 18 May 1971 Publication History

Abstract

In recent years associative memories have been receiving an increasing amount of attention. At the same time multiprocessor and parallel processing systems have been under study to solve very large problems. An associative processor is one form of a parallel processor that seems able to provide a cost effective solution to many problems such as the air traffic control (ATC) problem.

References

[1]
L D Wald MOS associative memories The Electronic Engineer August 1970 pp 54--56
[2]
L D Wald An associative memory using large scale integration National Aerospace Electronics Conference Dayton Ohio May 1970
[3]
A G Hanlon Content-addressable and associative memory systems---A survey IEEETEC Volume EC-15 No 4 1966 pp 509--521
[4]
J A Githens A fully parallel computer for radar data processing National Aerospace Electronics Conference Dayton Ohio May 1970
[5]
J C Murtha Parallel processing techniques in avionics National Aerospace Electronics Conference Dayton Ohio May 1970
[6]
J W Bremer A survey of mainframe semiconductor memories Computer Design May 1970 pp 63--73
[7]
R E Lyons The application of associative processing to air traffic control 1er Symposium International Sur La Re'gulation du Trafic, Trafic Ae'rien Versailles June 1970 pp 6A--31 to 6A--40
[8]
J A Rudolph et al With associative memory, speed is no barrier Electronics June 22 1970
[9]
N A Blake J C Nelson A projection of future ATC data processing requirements Proceedings of the IEEE March 1970

Cited By

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  • (1991)Associative massively parallel computersProceedings of the IEEE10.1109/5.9204179:4(469-479)Online publication date: Apr-1991
  • (1974)A study of fault tolerance techniques for associative processorsProceedings of the May 6-10, 1974, national computer conference and exposition10.1145/1500175.1500299(643-652)Online publication date: 6-May-1974
  • (1973)Associative memories and processors: An overview and selected bibliographyProceedings of the IEEE10.1109/PROC.1973.915261:6(722-730)Online publication date: 1973
  • Show More Cited By

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cover image ACM Other conferences
AFIPS '71 (Spring): Proceedings of the May 18-20, 1971, spring joint computer conference
May 1971
651 pages
ISBN:9781450379076
DOI:10.1145/1478786
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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  • AFIPS: American Federation of Information Processing Societies

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 18 May 1971

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Cited By

View all
  • (1991)Associative massively parallel computersProceedings of the IEEE10.1109/5.9204179:4(469-479)Online publication date: Apr-1991
  • (1974)A study of fault tolerance techniques for associative processorsProceedings of the May 6-10, 1974, national computer conference and exposition10.1145/1500175.1500299(643-652)Online publication date: 6-May-1974
  • (1973)Associative memories and processors: An overview and selected bibliographyProceedings of the IEEE10.1109/PROC.1973.915261:6(722-730)Online publication date: 1973
  • (1971)Universal logic modules implemented using LSI memory techniquesProceedings of the November 16-18, 1971, fall joint computer conference10.1145/1479064.1479093(177-194)Online publication date: 16-Nov-1971

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