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Elliptic Curve Cryptography on FPGA for Low-Power Applications

Published:01 March 2009Publication History
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Abstract

Elliptic curve cryptography has generated a lot of research interest due to its ability to provide greater security per bit compared to public key systems such as RSA. The designer of an elliptic curve hardware accelerator is faced with many choices at design time, each of which can impact the performance of the accelerator in different ways. There are many examples in the literature of how these design choices can effect the area and/or speed of an elliptic curve hardware accelerator. The effect of design choices on power and energy consumption in elliptic curve hardware has been less well studied. This article studies the effect of design choices on the power and energy consumption of an FPGA-based reconfigurable elliptic curve hardware accelerator. A reconfigurable processor has been used for different system parameters and the power and energy consumption measured. The power and energy results are presented and compared.

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  1. Elliptic Curve Cryptography on FPGA for Low-Power Applications

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                Junqing Sun

                Power efficiency and total energy consumption are becoming important factors for algorithms running on different platforms, from high-performance computers to battery-powered handsets. For example, power consumption of computers and cooling systems account for a significant portion of the cost of operating computing centers. For applications such as wireless sensor networks (WSNs), battery life actually determines directly the feasibility of a system. For communication security of the distributed networks mentioned above, cryptography is usually a must. This paper proposes an efficient architecture for elliptic curve cryptography, considering the security level, power efficiency, and total energy cost. A software system is also developed to generate very-high-speed integrated circuits (VHSIC) hardware description language (VHDL) codes. Keller et al. implement their algorithm on field-programmable gate arrays (FPGA) with different parameters. The performance comparison results point to the best power/energy tradeoff. This is a very well-written paper that consists of algorithms, hardware architectures, and detailed performance results and comparisons. Online Computing Reviews Service

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                • Published in

                  cover image ACM Transactions on Reconfigurable Technology and Systems
                  ACM Transactions on Reconfigurable Technology and Systems  Volume 2, Issue 1
                  March 2009
                  142 pages
                  ISSN:1936-7406
                  EISSN:1936-7414
                  DOI:10.1145/1502781
                  Issue’s Table of Contents

                  Copyright © 2009 ACM

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                  Publication History

                  • Published: 1 March 2009
                  • Accepted: 1 December 2008
                  • Revised: 1 October 2008
                  • Received: 1 May 2008
                  Published in trets Volume 2, Issue 1

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