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View all- Yang YJha N(2014)FinPrin: FinFET Logic Circuit Analysis and Optimization Under PVT VariationsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2013.229388622:12(2462-2475)Online publication date: Dec-2014
- Yang YJha N(2013)Fin PrinProceedings of the 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems10.1109/VLSID.2013.213(350-355)Online publication date: 5-Jan-2013