research-article

PPT: joint performance/power/thermal management of DRAM memory for multi-core systems

Authors:

Chung-Hsiang Lin,

Ku-Jei KingAuthors Info & Claims

ISLPED '09: Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design

Pages 93 - 98

https://doi.org/10.1145/1594233.1594255

Published: 19 August 2009 Publication History

Publisher Site Get Access

Abstract

With the popularity of multi-core architecture, to sustain the memory demands from different cores, the memory system is expected to grow significantly in both speed and capacity. This will lead to increasing power consumption in the memory system. Therefore, it is critical to address the power issue in the memory subsystem. In designing a power-aware memory system, due to the interplay among power, thermal and performance, all the three factors need to be taken into account. In this paper, we propose the first joint performance, power and thermal management framework (PPT) through orchestrating task execution and page allocation. The PPT framework adapts to system loading to maximize power saving and avoid memory hotspot at the same time whiling sustaining the system bandwidth demand.

References

[1]

C. Armour-Brown, K. Fitzhardinge, T. Hughes, N. Nethercote, P. Mackerras, D. Mueller, J. Seward, R. Walsh, and J. Weidendorfer. Valgrind. http://valgrind.org/, 2000--2007.

[2]

K. M. Bensley. Fb-dimm performance/thermal management. Intel Developer Forum, 2006.

[3]

S. P. E. Corporation. Spec2000. http://www.spec.org, 2000.

[4]

H. Huang, P. Pillai, and K. G. Shin. Design and implementation of power-aware virtual memory. The Proceeding of Usenix 2003 Annual Technical Conference, pp. 57--70, 2003.

Digital Library

[5]

H. Huang, K. G. Shin, C. Lefurgy, and T. Keller. Improving energy efficiency by making dram less randomly accessed. International Symposium on Low Power Electronics and Design (ISLPED), San Diego, California, USA, August 8--10, 2005.

Digital Library

[6]

J. Iyer, C. L. Hall, J. Shi, and Y. Huang. System memory power and thermal management in platforms built on intel centrino duo mobile technology. Intel Technology Journal, 2006.

[7]

J. Lin, H. Zheng, Z. Zhu, E. Gorbatov, H. David, and Z. Zhang. Software thermal management of dram memory for multicore systems. Proceedings of the International Conference on Measurement and Modeling of Computer Systems, 2008.

Digital Library

[8]

H. Koc, O. Ozturk, M. Kandemir, S. H. K. Narayanan, and E. Ercanli. Minimizing energy consumption of banked memories using data recomputation. International Symposium on Low Power Electronics and Design (ISLPED), Tegernsee, Germany, 2006.

Digital Library

[9]

A. R. Lebeck, X. Fan, H. Zeng, and C. S. Ellis. Power aware page allocation. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 105--116, November, 2000.

Digital Library

[10]

C. Lefurgy, K. Rajamani, F. Rawson,W. Felter, M. Kistler, and T. W. Keller. Energy management for commercial servers. IEEE Computer, 36(12):39--48, December 2003.

Digital Library

[11]

X. Li, Z. Li, F. M. David, P. Zhou, Y. Zhou, S. V. Adve, and S. Kumar. Performance directed energy management for main memory and disks. In Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 271--283, October 2004.

Digital Library

[12]

J. Lin, H. Zheng, Z. Zhu, H. David, and Z. Zhang. Thermal modeling and management of dram memory system. The 34th International Symposium on Computer Architecture, 2007.

Digital Library

[13]

B. K. Mathew, S. A. McKee, J. B. Carter, and A. Davis. Design of a parallel vector access unit for sdram memory systems. Proceedings of the 6th International Symposium on High-Performance Computer Architecture, pp. 39--48, 2000.

[14]

I. Micron Technology. Ddr2 sdram. http://download.micron.com/pdf/datasheets/dram/ddr2/512MbDDR2.pdf, 2004.

[15]

O. Ozturk and Kandemir. Data replication in banked drams for reducing energy consumption. 7th International Symposium on Quality Electronic Design (ISQED), March 2006.

Digital Library

[16]

V. Pandey, W. Jiang, Y. Zhou, and R. Bianchini. Dma-aware memory energy management. The proceeding of the 12th International Symposium on High Performance Computer Architecture (HPCA), 2006.

[17]

A. Seznec and J. Lenfant. Interleaved parallel schemes: Improving memory throughput on supercomputers. Proceedings of the 19th Annual International Symposiumn Computer Architecture, pages 246--255, 1992.

Digital Library

[18]

K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan. Temperature-aware microarchitecture. Proceedings of the 30th International Symposium on Computer Architecture, pages 2--13, 2003.

Digital Library

[19]

D. Wang, B. Ganesh, and B. Jacob. The university of maryland memory-system simulator. http://www.ece.umd.edu/dramsim/, 2006.

Cited By

Kommareddy VHammond SHughes CSamih AAwad A(2019)Page migration support for disaggregated non-volatile memoriesProceedings of the International Symposium on Memory Systems10.1145/3357526.3357543(417-427)Online publication date: 30-Sep-2019
https://dl.acm.org/doi/10.1145/3357526.3357543
Kommareddy VHughes CHammond SAwad A(2019)Investigating Fairness in Disaggregated Non-Volatile Memories2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2019.00028(104-110)Online publication date: Jul-2019
https://doi.org/10.1109/ISVLSI.2019.00028
He XChen Y(2018)Deadline-aware Memory Scheduler and Governor for Heterogeneous Processors2018 IEEE 16th International Conference on Industrial Informatics (INDIN)10.1109/INDIN.2018.8471962(239-244)Online publication date: Jul-2018
https://doi.org/10.1109/INDIN.2018.8471962
Show More Cited By

Index Terms

PPT: joint performance/power/thermal management of DRAM memory for multi-core systems
1. General and reference
  1. Cross-computing tools and techniques
    1. Design

Recommendations

A power and temperature aware DRAM architecture
DAC '08: Proceedings of the 45th annual Design Automation Conference

Technological advances enable modern processors to utilize increasingly larger DRAMs with rising access frequencies. This is leading to high power consumption and operating temperature in DRAM chips. As a result, temperature management has become a real ...
An approach for adaptive DRAM temperature and power management
ICS '08: Proceedings of the 22nd annual international conference on Supercomputing

With rising capacities and higher accessing frequencies, high-performance DRAMs are providing increasing memory access bandwidth to the processors. However, the increasing DRAM performance comes with the price of higher power consumption and temperature ...
Energy and Performance Optimization of Demand Paging With OneNAND Flash

New fusion memory devices consisting of multiple heterogeneous memory components in a single die or package offer efficient ways to optimize embedded systems in terms of energy, performance, and cost. Samsung Electronics recently announced the OneNAND ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

ISLPED '09: Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design

August 2009

452 pages

ISBN:9781605586847

DOI:10.1145/1594233

General Chairs:
Jörg Henkel
University of Karlsruhe
,
Ali Keshavarzi
Taiwan Semiconductor Manufacturing Company
,
Program Chairs:
Naehyuck Chang
Seoul National University
,
Tahir Ghani
Intel Corporation

Copyright © 2009 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 19 August 2009

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Conference

ISLPED'09

Sponsor:

ISLPED'09: International Symposium on Low Power Electronics and Design

August 19 - 21, 2009

CA, San Fancisco, USA

Acceptance Rates

ISLPED '09 Paper Acceptance Rate 72 of 208 submissions, 35%;

Overall Acceptance Rate 398 of 1,159 submissions, 34%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

18
Total Citations
View Citations
600
Total Downloads

Downloads (Last 12 months)15
Downloads (Last 6 weeks)1

Reflects downloads up to 25 Feb 2025

Other Metrics

View Author Metrics

Citations

Cited By

Kommareddy VHammond SHughes CSamih AAwad A(2019)Page migration support for disaggregated non-volatile memoriesProceedings of the International Symposium on Memory Systems10.1145/3357526.3357543(417-427)Online publication date: 30-Sep-2019
https://dl.acm.org/doi/10.1145/3357526.3357543
Kommareddy VHughes CHammond SAwad A(2019)Investigating Fairness in Disaggregated Non-Volatile Memories2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2019.00028(104-110)Online publication date: Jul-2019
https://doi.org/10.1109/ISVLSI.2019.00028
He XChen Y(2018)Deadline-aware Memory Scheduler and Governor for Heterogeneous Processors2018 IEEE 16th International Conference on Industrial Informatics (INDIN)10.1109/INDIN.2018.8471962(239-244)Online publication date: Jul-2018
https://doi.org/10.1109/INDIN.2018.8471962
Pekhimenko GBolotin EVijaykumar NMutlu OMowry TKeckler S(2016)A case for toggle-aware compression for GPU systems2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2016.7446064(188-200)Online publication date: Mar-2016
https://doi.org/10.1109/HPCA.2016.7446064
Zhang SZhu Z(2014)Access-Aware Memory Thermal ManagementProceedings of the 2014 9th IEEE International Conference on Networking, Architecture, and Storage10.1109/NAS.2014.46(268-274)Online publication date: 6-Aug-2014
https://dl.acm.org/doi/10.1109/NAS.2014.46
Ebrahimi KJones GFleischer A(2014)A review of data center cooling technology, operating conditions and the corresponding low-grade waste heat recovery opportunitiesRenewable and Sustainable Energy Reviews10.1016/j.rser.2013.12.00731(622-638)Online publication date: Mar-2014
https://doi.org/10.1016/j.rser.2013.12.007
Ayoub RNath RRosing T(2013)CoMETCACM Transactions on Design Automation of Electronic Systems10.1145/253438119:1(1-28)Online publication date: 20-Dec-2013
https://dl.acm.org/doi/10.1145/2534381
Jia GLi XWan JShi LWang C(2013)Coordinate page allocation and thread group for improving main memory power efficiencyProceedings of the Workshop on Power-Aware Computing and Systems10.1145/2525526.2525851(1-5)Online publication date: 3-Nov-2013
https://dl.acm.org/doi/10.1145/2525526.2525851
Jantz MStrickland CKumar KDimitrov MDoshi K(2013)A framework for application guidance in virtual memory systemsACM SIGPLAN Notices10.1145/2517326.245154348:7(155-166)Online publication date: 16-Mar-2013
https://dl.acm.org/doi/10.1145/2517326.2451543
Jantz MStrickland CKumar KDimitrov MDoshi KMuir SHeiser GBlackburn S(2013)A framework for application guidance in virtual memory systemsProceedings of the 9th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments10.1145/2451512.2451543(155-166)Online publication date: 16-Mar-2013
https://dl.acm.org/doi/10.1145/2451512.2451543
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Figures

Tables

Media

View Table of Conten