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Parameterizable floating-point library for arithmetic operations in FPGAs

Published: 31 August 2009 Publication History

Abstract

Floating-point operations are an essential requisite in a wide range of computational and engineering applications that need good performance and high precision. Current advances in VLSI technology raised the density integration fast enough, allowing the designers to develop directly in hardware several floating-point operations commonly implemented in software. Until now, most of the research has not focused on the tradeoff among the need of high performance and the cost of the size of logic area, associated with the level of precision, parameters that are very important in a wide variety of applications such as robotics, image and digital signal processing. This paper describes an FPGA implementation of a parameterizable floating-point library for addition/subtraction, multiplication, division and square root operations. Architectures based on Goldschmidt algorithm were implemented for computing floating-point division and square root. The library is parameterizable by bit-width and number of iterations. An analysis of the mean square error and the cost in area consumption is done in order to find, for general purpose applications, the feasible bit-width representation, number of iterations and number of addressable words for storing initial seeds of the Goldschmidt algorithm.

References

[1]
Y. Kung, K. Tseng, C. Chen, H. Sze, and A. Wang. Fpga-implementation of inverse kinematics and servo controller for robot manipulator. In Proc. IEEE Int. on Robotics and Biomimetics, pages 1163--1168, Dec. 2006.
[2]
X. Wang. Variable Precision Floating-point Divide and Square Root for Efficient FPGA Implementation of Image and Signal Processing Algorithms. PhD thesis, Northeastern University, 2007.
[3]
R. Andraka. A survey of cordic algorithms for fpga based computers. In Proc. ACM Inter. Symp. on Field Programmable Gate Arrays, pages 191--200, Feb. 1998.
[4]
C. Shuang-yan, W. Dong-hui, Z. Tie-jun, and H. Chao-huan. Design and implementation of a 64/32-bit floating-point division, reciprocal, square root, and inverse square root unit. In Proc. IEEE Int. on Solid-State and Integrated Circuit Tech, pages 1976--1979, Oct. 2006.
[5]
X. Wang and B. Nelson. Trade-offs of designing floating-point division and square root on virtex fpgas. In IEEE Symp. on Field Programmable Custom Comp, pages 195--203, Apr. 2003.
[6]
K. Wires and M. Schulte. Reciprocal square root units with operand modification and multiplication. Journal of VLSI Signal Processing Systems, 42(3):257--272, Mar. 2006.
[7]
ANSI/IEEE Std 754-1985. IEEE standard for binary floating-point arithmetic, Aug. 1985.
[8]
Processor Architecture. NIOS II Reference Handbook. {Online}: http://www.altera.com/, Nov. 2008.
[9]
G. Govindu, R. Scrofano, and V. Prasanna. A library of parameterizable floating-point cores for fpgas and their application to scientific computing. In Proc. Int. Conf. Eng. of Reconfig. Syst. and Algorithms, pages 137--148, Jun 2005.
[10]
B. Lee and N. Burgess. Parameterizable floating-point operations on fpga. In Proc. IEEE Conf. On Signals, Syst. and Computers, pages 1064--1068, Nov. 2002.
[11]
B. Fagin and C. Renard. Field programmable gate arrays and floating point arithmetic. Journal on VLSI Systems, 2(3):365--367, Sept. 1994.
[12]
L. Louca, T. Cook, and W. Johnson. Implementation of IEEE single precision floating point addition and multiplication on fpgas. In Proc. IEEE Symp. on FPGAs for Custom Comp. Mach., pages 107--116, Apr. 1996.
[13]
W. Ligon, S. McMillan, G. Monn, K. Schoonover, F. Stivers, and K. Underwood. A re-evaluation of the practicality of floating-point operations on fpgas. In Proc. IEEE Symp. on Field Programmable Custom Comp. Mach., pages 206--215, Apr. 1998.
[14]
M. Beauchamp, S. Hauck, K. Underwood, and S. Hemmert. Embedded floating-point units in fpgas. In Proc. ACM Int. Symp. on Field Programmable Gate Arrays, pages 12--20, Feb. 2006.
[15]
J. Liang, R. Tessier, and O. Mencer. Floating point unit generation and evaluation for fpgas. In Proc. IEEE Int. Symp. on Field Programmable Custom Comp. Mach., pages 185--194, Apr. 2003.
[16]
K. Underwood. Fpgas vs. cpus: trends in peak floating-point performance. In Proc. ACM Inter. Symp. on Field Programmable Gate Arrays, pages 171--180, Feb. 2004.
[17]
T. Kwon, J. Sondeen, and J. Draper. Floating-point division and square root implementation using a taylor-series expansion algorithm with reduced look-up tables. In Proc. IEEE Int. Symp. Circuits and Systems, pages 954--957, Aug. 2008.
[18]
Y. Li and W. Chu. Implementation of single precision floating point square root on fpgas. In Proc. IEEE Symp. on Custom Computing Machines, pages 226--232, Apr. 1997.
[19]
P. Montuschi and M. Mezzalama. Survey of square rooting algorithms. In Proc. IEEE Computers and Digital Techniques, page 31--40, Jan. 1990.
[20]
R. Goldschmidt. Applications of division by convergence. Master's thesis, M.I.T., 1964.
[21]
S. Kilts. Advanced FPGA Design. John Wiley&Sons, Inc., New Jersey, 2007.
[22]
P. Markstein. Software division and square root using goldschmidt's algorithms. In Conf. on Real Numbers and Computers, pages 146--157, Nov. 2004.

Cited By

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  • (2020)Implementation and Verification of IEEE-754 64-bit Floating-Point Arithmetic Library for 8-bit Soft-Core Processors2020 8th International Electrical Engineering Congress (iEECON)10.1109/iEECON48109.2020.229455(1-4)Online publication date: Mar-2020
  • (2017)Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)10.1109/ICECS.2017.8292070(482-485)Online publication date: Dec-2017
  • (2016)Open-Source Variable-Precision Floating-Point Library for Major Commercial FPGAsACM Transactions on Reconfigurable Technology and Systems10.1145/28515079:3(1-17)Online publication date: 19-Jul-2016
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cover image ACM Conferences
SBCCI '09: Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
August 2009
325 pages
ISBN:9781605587059
DOI:10.1145/1601896
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 31 August 2009

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Author Tags

  1. FPGA
  2. computer arithmetic
  3. floating-point
  4. goldschmidt

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SBCCI '09 Paper Acceptance Rate 50 of 119 submissions, 42%;
Overall Acceptance Rate 133 of 347 submissions, 38%

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Cited By

View all
  • (2020)Implementation and Verification of IEEE-754 64-bit Floating-Point Arithmetic Library for 8-bit Soft-Core Processors2020 8th International Electrical Engineering Congress (iEECON)10.1109/iEECON48109.2020.229455(1-4)Online publication date: Mar-2020
  • (2017)Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)10.1109/ICECS.2017.8292070(482-485)Online publication date: Dec-2017
  • (2016)Open-Source Variable-Precision Floating-Point Library for Major Commercial FPGAsACM Transactions on Reconfigurable Technology and Systems10.1145/28515079:3(1-17)Online publication date: 19-Jul-2016
  • (2015)FPGA implementation of the EKF algorithm for localization in mobile robotics using a unified hardware module approach2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)10.1109/ReConFig.2015.7393315(1-6)Online publication date: Dec-2015
  • (2015)FPGA-based approach for change detection in GTAW welding processJournal of the Brazilian Society of Mechanical Sciences and Engineering10.1007/s40430-015-0371-z38:3(913-929)Online publication date: 23-Aug-2015
  • (2012)FPGA implementation of large-scale matrix inversion using single, double and custom floating-point precision2012 VIII Southern Conference on Programmable Logic10.1109/SPL.2012.6211787(1-6)Online publication date: Mar-2012
  • (2011)FPGA-based image processing for omnidirectional vision on mobile robotsProceedings of the 24th symposium on Integrated circuits and systems design10.1145/2020876.2020904(113-118)Online publication date: 30-Aug-2011
  • (2011)A suitable FPGA implementation of floating-point matrix inversion based on Gauss-Jordan elimination2011 VII Southern Conference on Programmable Logic (SPL)10.1109/SPL.2011.5782659(263-268)Online publication date: Apr-2011
  • (2010)FPGA-Based Platform Development for Change Detection in GTAW Welding ProcessProceedings of the 2010 International Conference on Reconfigurable Computing and FPGAs10.1109/ReConFig.2010.78(61-66)Online publication date: 13-Dec-2010
  • (2010)A methodology for "on-line" monitoring system in a welding process using FPGAs2010 IEEE International Conference on Industrial Technology10.1109/ICIT.2010.5472672(162-167)Online publication date: Mar-2010
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