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Acceleration of the L4/Fiasco microkernel using scratchpad memory

Published: 17 June 2008 Publication History

Abstract

In this paper we analyze the potential of using scratchpad memory in embedded devices to accelerate the operation of the L4/Fiasco microkernel affecting basically all applications on top of the kernel including virtualization software. We examine several low-level L4 system calls using a virtual prototype of Infineon's S-GOLD® platform for mobile phones based on an ARM11 processor. We present a profiling strategy identifying critical parts of the microkernel to be placed on the scratchpad memory. Applying this approach we achieve a worstcase speedup of up to 29% with one page of scratchpad memory (4 kB) and up to 63% with two pages. With regard to the real-time capability of Fiasco, worst-case interrupt latency can be improved by almost 45% with only 4 kB of scratchpad memory.

References

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M. Verma and P. Marwedel, Advanced Memory Optimization Techniques for Low-Power Embedded Processors, Springer, 2007.
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R. Banakar, S. Steinke, B.-S. Lee, M. Balakrishnan and P. Marwedel, "Scratchpad Memory: A Design Alternative for Cache On-chip Memory in Embedded Systems", Proceedings of the 10th International Symposium on Hardware/Software Codesign (CODES), May 2002, pp. 73--78.
[3]
I. Puaut and C. Pais, "Scratchpad Memories vs Locked Caches in Hard Real-time Systems: A Quantitative Comparison", Proceedings Design, Automation and Test in Europe (DATE), April 2007, pp. 1484--1489.
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L. Wehmeyer and P. Marwedel, "Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software", Proceedings Design, Automation and Test in Europe (DATE), Vol. 1, March 2005, pp. 600--605.
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http://os.inf.tu-dresden.de/fiasco/, The Fiasco Microkernel.
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R. L. Roan, "Optimizing Architectures for Performance and Area Using Virtual System Prototypes", Embedded Technology Journal, November 2006.
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"ARM1176JZF-S Processor Technical Reference Manual", ARM Limited, Lit.-Nr.: ARM DDI 0301F, 2004--2007.
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"VaST Generic Platform Memory v3.12 User Guide", VaST Systems Technology Corp., 2006.
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H. Cho, B. Egger, J. Lee and H. Shin, "Dynamic Data Scratchpad Memory Management for a Memory Subsystem with an MMU", Proceedings International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Vol. 42, July 2007, pp. 195--206.

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cover image ACM Conferences
MobiVirt '08: Proceedings of the First Workshop on Virtualization in Mobile Computing
June 2008
31 pages
ISBN:9781605583280
DOI:10.1145/1622103
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 17 June 2008

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  • (2012)Joint Uplink and Downlink Performance Profiling of LTE Protocol Processing on a Mobile PlatformInnovations in Embedded and Real-Time Systems Engineering for Communication10.4018/978-1-4666-0912-9.ch007(122-140)Online publication date: 2012
  • (2011)Exploration of energy efficient acceleration concepts for the ROHCv2 in LTE handsets2011 6th IEEE International Symposium on Industrial and Embedded Systems10.1109/SIES.2011.5953666(232-237)Online publication date: Jun-2011
  • (2010)Joint Uplink and Downlink Performance Profiling of LTE Protocol Processing on a Mobile PlatformInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20101001021:4(21-39)Online publication date: 1-Oct-2010
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