skip to main content
10.1145/1629911.1629995acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
research-article

Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions

Published: 26 July 2009 Publication History

Abstract

Carbon Nanotube Field-Effect Transistors (CNFETs) show promise as extensions to silicon-CMOS. Ideal CNFET circuits can potentially provide 20X Energy-Delay-Product benefits over silicon-CMOS at the 16 nm technology node. However, several challenges must be overcome before such performance benefits can be experimentally realized. In this paper, we present a brief overview of CNFET technology, and address commonly raised concerns through a series of Frequently Asked Questions (FAQs). We also provide a CNFET technology outlook which includes a survey of challenges as well as existing and potential solutions to these challenges.

References

[1]
{Akinwande 08a} Akinwande, D., et al., "Monolithic Integration of CMOS VLSI and Carbon Nanotubes for Hybrid Nanotechnology Application", IEEE Trans. on Nanotechnology, vol. 7, issue 5, pp. 636--639, 2008.
[2]
{Akinwande 08b} D. Akinwande, et al., "Analytical Ballistic Theory of Carbon Nanotube Transistors: Experimental Validation, Device Physics, Parameter Extraction, and Performance Projection", Journal of Applied Physics, vol. 104, pp. 124514-1--124514-7, 2008.
[3]
{Akinwande 09} Akinwande, D., Y. Nishi, H.-S.P. Wong, "Carbon Nanotube Quantum Capacitance for Non-Linear Terahertz Circuits", IEEE Trans. Nanotechnology, vol. 8, No. 1, pp. 31--36, 2009.
[4]
{Amlani 06} Amlani, I., et al., "First Demonstration of AC Gain From a Single-walled Carbon Nanotube Common-Source Amplifier", Proc. IEDM, pp. 1--4, 2006.
[5]
{Avouris 07} Avouris, P., Z. Chen, V. Perebeinos, "Carbon-based electronics", Nature Nanotechnology, 2, p. 605--615, 2007.
[6]
{Balijepalli 07} Balijepalli, A., S. Sinha, Y. Cao, "Compact modeling of carbon nanotube transistor for early stage process-design exploration", Proc. International Symposium on Low Power Electronics and Design, pp. 2--7, 2007.
[7]
{Bobba 09} Bobba, S. et al., "Design of Compact Imperfection-Immune CNFET Layouts for Standard-Cell-Based Logic Synthesis", Proc. DATE, 2009.
[8]
{Borkar 05} Borkar, S., et al., "Statistical circuit design with carbon nanotubes", United States Patent Application 2007015506.
[9]
{Cao 08a} Cao, Q., et al., "Medium-Scale Carbon Nanotube Thin-Film Integrated Circuits on Flexible Plastic Substrates", Nature 454, 495--500, 2008.
[10]
{Cao 08b} Cao, Q., and J. A. Rogers, "Random Networks and Aligned Arrays of Single-Walled Carbon Nanotubes for Electronic Device Applications", Nano Res, 1: 259 272, 2008.
[11]
{Chen 03} Chen, R., et al., "Noncovalent functionalization of carbon nanotubes for highly specific electronic biosensors", Proc. Natl. Acad. Sci., vol. 100, pp. 4984--4989, 2003.
[12]
{Chen 05} Chen J., C. Klinke, A. Afzali and P. Avouris, "Self-aligned carbon nanotube transistors with charge transfer doping", Appl. Phys. Lett., 86, 123108, 2005.
[13]
{Chen 06} Chen Z., et al., "An Integrated Logic Circuit Assembled on a Single Carbon Nanotube", Science 311 (5768), 1735.
[14]
{Cho 07} Cho, T. S., et al., "A Low Power Carbon Nanotube Chemical Sensor System", Proc. CICC, pp. 181--184, 2007.
[15]
{Close 08a} G. F. Close, H.-S. P. Wong, "Assembly and Characterization of Multi-wall Carbon Nanotubes", IEEE Trans. Nanotechnology, vol. 7, issue 5, pp. 596--600, 2008.
[16]
{Close 08b} Close G. F., et al., "A 1 GHz Integrated Circuit with Carbon Nanotube Interconnects and Silicon Transistors", Nano Letters 2008 8 (2), 706--709.
[17]
{Collins 01} Collins, P., S. Arnold, P. Avouris, "Engineering carbon nanotubes and nanotube circuits using electrical breakdown", Science, vol. 292, pp. 706--709, 2001.
[18]
{Dai 02} Dai, H., "Carbon Nanotubes: Synthesis, Integration, and Properties", Acc. Chem. Res., 35, 1035--1044, 2002.
[19]
{Dehon 05} DeHon, A., and H. Naeimi, "Seven Strategies for Tolerating Highly Defective Fabrication", IEEE Design and Test of Computers, Vol. 22, No. 4, pp. 306--315, 2005.
[20]
{Deng 07a} Deng, J., et al., "Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections", Proc. ISSCC, pp. 70--588, 2007.
[21]
{Deng 07b} Deng, J., and H. -S. P. Wong, "A Compact SPICE Model for Carbon Nanotube Field Effect Transistors Including Non-Idealities and Its Application --- Part I: Model of the Intrinsic Channel Region", IEEE Trans. Elec. Dev., pp. 3186--3194, 2007.
[22]
{Deng 08} Deng, J., et al., "Carbon nanotube transistor compact model for circuit design and performance optimization", J. Emerg. Technol. Comput. Syst. 4, 2, 1--20, 2008.
[23]
{Engel 08} Engel, M., et al., "Thin Film Nanotube Transistors Based on Self-Assembled, Aligned, Semiconducting Carbon Nanotube Arrays", ACS Nano 2008 2(12), 2445--2452.
[24]
{Goldstein 01} Goldstein, S. C., and M. Budiu, "NanoFabrics: spatial computing using molecular electronics", Proc. Intl. Symp. Computer Architecture, pp. 178--191, 2001.
[25]
{Grüner 06} Grüner, G., "Carbon Nanotube Transistors for Biosensing Applications", Analytical and Bioanalytical Chemistry, 384, 322, 2006.
[26]
{Guo 02} Guo, J., Mark Lundstrom, and Supriyo Datta, "Performance projections for ballistic carbon nanotube field-effect transistors", Appl. Phys. Lett. 80, 3192, 2002.
[27]
{Guo 04} Guo, J., S. Datta, M. Lundstrom, and M. P. Anantram, "Toward multi-scale modeling of carbon nanotube transistors", Int. J. Multiscale Comput. Eng., vol. 2, pp. 257--277, 2004.
[28]
{Han 05} Han, S., X. Liu and C. Zhou, "Template-Free Directional Growth of Single-Walled Carbon Nanotubes on a- and r-Plane Sapphire", J. Am. Chem. Soc., vol. 127, pp. 5294--5295, 2005.
[29]
{Hassanien 05} Hassanien, A., et al., "Selective etching of metallic single-wall carbon nanotubes with hydrogen plasma", Nanotechnology, vol 16, pp. 278--281, 2005.
[30]
{Javey 03a} Javey, A., et al., "Ballistic Carbon Nanotube Transistors", Nature, 424, 654--657, 2003.
[31]
{Javey 03b} Javey, A., Q. Wang, W. Kim, H. Dai. "Advancements in Complementary Carbon Nanotube Field-Effect Transistors", Proc. IEDM, pp. 31.2.1--31.2.4, 2003.
[32]
{Javey 05} Javey, A., et al., "High performance nanotube n-FETs with chemically doped contacts", Nano Letters, p. 345--348, 2005.
[33]
{Javey 09} Javey, A., and J. Kong (editors), Carbon Nanotube Electronics, Springer, 2009.
[34]
{Kang 07} Kang, S. J., et al., "High-Performance Electronics Using Dense, Perfectly Aligned Arrays of Single-Walled Carbon Nanotubes", Nature Nanotechnology, vol. 2, pp. 230--236, 2007.
[35]
{Kauffman 08a} Kauffman, D. R., A. Star, "Carbon nanotube gas and vapor sensors", Angew. Chem. Int. Ed., 47, 6550--6570, 2008.
[36]
{Kauffman 08b} Kauffman, D. R., A. Star, "Electronically monitoring biological interactions with carbon nanotube field-effect transistors", Chem. Soc. Rev., 37, 1197--1208, 2008.
[37]
{Kim 05} Kim W., et al., "Electrical contacts to carbon nanotubes down to 1 nm in diameter", Appl. Phys. Lett. 87, 173101, 2005.
[38]
{Le Louarn 07} Le Louarn A., et al., "Intrinsic current gain cutoff frequency of 30 GHz with carbon nanotube transistors", Appl. Phys. Lett., 90, 233108, 2007.
[39]
{LeMieux 08} LeMieux, M., et al., "Self-Sorted, Aligned Nanotube Networks for Thin-Film Transistors", Science, vol. 321, pp. 101--104, 2008.
[40]
{Li 04} Li, Y., et al., "Preferential Growth of Semiconducting Single-Walled Carbon Nanotubes by a Plasma Enhanced CVD Method", Nano Letters, vol. 4, pp. 317--321, 2004.
[41]
{Liang 08} Liang, J., D. Akinwande, H.-S. P. Wong, "Carrier Density and Quantum Capacitance for Semiconducting Carbon Nanotubes", J. Applied Physics, vol. 104, pp. 064515-1--064515-6, September 29, 2008.
[42]
{Lin 09a} Lin, A., et al., "Threshold Voltage and On-Off Ratio Tuning for Multiple-tube Carbon Nanotube FETs", IEEE Trans. Nanotechnology, vol. 8, No. 1, pp. 4--9, 2009.
[43]
{Lin 09b} Lin, A., et al., "A Metallic-CNT-Tolerant Carbon Nanotube Technology using Asymmetrically-Correlated CNTs (ACCNT)", to appear in Proc. VLSI Tech. Symp., 2009.
[44]
{Martel 98} Martel, R., et al., Single- and multi-wall carbon nanotube field-effect transistors", App. Phys. Lett. 73, 2447, 1998.
[45]
{Patil 07} Patil, N., et al., "Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits", Proc. DAC, pp. 958--961, 2007.
[46]
{Patil 08a} Patil, N., et al., "Integrated Wafer-scale Growth and Transfer of Directional Carbon Nanotubes and Misaligned-Carbon-Nanotube-Immune Logic Structures," Proc. Symp. VLSI Technology, pp. 205--206, 2008.
[47]
{Patil 08b} Patil, N., et al., "Design Methods for Misaligned and Mis-positioned Carbon-Nanotube-Immune Circuits", IEEE Trans. Computer-Aided Design, pp. 1725--1736, 2008.
[48]
{Patil 09a} Patil, N., et al., "Circuit-Level Performance Benchmarking and Scalability of Carbon Nanotube Transistor Circuits", IEEE Trans. Nanotechnology, vol. 8, no. 1, pp. 37--45, 2009.
[49]
{Patil 09b} Patil, N., et al., "Wafer-Scale Growth and Transfer of Aligned Single-Walled Carbon Nanotubes", IEEE Trans. Nanotechnology, 2009.
[50]
{Qu 08} Qu, L., D. Feng, and L. Dai, "Preferential Syntheses of Semiconducting Vertically Aligned Single-Walled Carbon Nanotubes for Direct Use in FETs", Nano Letters, vol. 8(9), pp. 2682--2687, 2008.
[51]
{Rad 06} Rad, R. M. and M. Tehranipoor, "A Hybrid FPGA Using Nanoscale Cluster and CMOS Scale Routing", Proc. Design Automation Conf., pp. 727--730, 2006.
[52]
{Rao 05} Rao, W., A. Orailoglu and R. Karri, "Fault-Tolerant Nanoelectronic Processor Architectures", Proc. Asia South Pacific Design Automation Conf., pp. 311--316, 2005.
[53]
{Reina 07} Reina, A., et al., "Growth mechanism of long and horizontally aligned carbon nanotubes by chemical vapor deposition", J. Phys. Chem. C, 111, 7292--7297, 2007.
[54]
{Saito 98} Saito, R., G. Dresselhaus and M. Dresselhaus, Physical Properties of Carbon Nanotubes, Imperial College Press, 1998.
[55]
{Shim 01} Shim M., et al., "Polymer Functionalization for Air-Stable n-type Carbon Nanotube Field Effect Transistors", J. Am. Chem. Soc. 123(46), 11512--11513, 2001.
[56]
{Tahoori 06} Tahoori, M. B., "Application-Independent Defect-Tolerance of Reconfigurable Nano-Architectures", ACM Journal Emerging Technologies in Computing, 2006.
[57]
{Tang 01} Tang, S., et al., "FinFET - A Quasi-Planar Double-Gate MOSFET", Proc. ISSCC, pp. 118--119, 2001.
[58]
{Tans 98} Tans, S. J., et al., "Room-temperature transistor based on a single carbon nanotube", Nature 393, 49, 1998.
[59]
{Wong 07} Wong, S., et al., "Monolithic 3D Integrated Circuits", Proc. VLSI-TSA, pp. 1--4, 2007.
[60]
{Yang 06} Yang, C., et al., "Preferential etching of metallic single-walled carbon nanotubes with small diameter by fluorine gas", Phys Rev B 73, pp. 75419, 2006.
[61]
{Zhang 06} Zhang, G., et al., "Selective Etching of Metallic Carbon Nanotubes by Gas-Phase Reaction", Science, Vol. 314, pp. 974--977, 2006.
[62]
{Zhang 07} Zhang, Z., et al., "Doping-Free Fabrication of Carbon Nanotube Based Ballistic CMOS Devices and Circuits", Nano Letters 7 (12), 3603--3607, 2007.
[63]
{Zhang 08} Zhang, J., N. Patil, and S. Mitra, "Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits", Proc. DATE, pp. 1009--1014, 2008.
[64]
{Zhang 09a} Zhang, J., N. Patil and S. Mitra, "Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits", to appear in IEEE Trans. CAD, 2009.
[65]
{Zhang 09b} Zhang, J., N. Patil, A. Hazeghi and S. Mitra, "Carbon Nanotube Circuits in the Presence of Carbon Nanotube Density Variations", Proc. DAC, 2009.

Cited By

View all
  • (2021)Variation-Aware Delay Fault Testing for Carbon-Nanotube FET CircuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.304541729:2(409-422)Online publication date: Feb-2021
  • (2020)Low Power, High Performance CNTFET-Based SRAM Cell DesignsMajor Applications of Carbon Nanotube Field-Effect Transistors (CNTFET)10.4018/978-1-7998-1393-4.ch006(93-128)Online publication date: 2020
  • (2020)CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116395(963-966)Online publication date: Mar-2020
  • Show More Cited By

Index Terms

  1. Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    DAC '09: Proceedings of the 46th Annual Design Automation Conference
    July 2009
    994 pages
    ISBN:9781605584973
    DOI:10.1145/1629911
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 26 July 2009

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. CNFET
    2. carbon nanotube transistor
    3. carbon nanotubes

    Qualifiers

    • Research-article

    Conference

    DAC '09
    Sponsor:
    DAC '09: The 46th Annual Design Automation Conference 2009
    July 26 - 31, 2009
    California, San Francisco

    Acceptance Rates

    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

    Upcoming Conference

    DAC '25
    62nd ACM/IEEE Design Automation Conference
    June 22 - 26, 2025
    San Francisco , CA , USA

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)9
    • Downloads (Last 6 weeks)4
    Reflects downloads up to 17 Jan 2025

    Other Metrics

    Citations

    Cited By

    View all
    • (2021)Variation-Aware Delay Fault Testing for Carbon-Nanotube FET CircuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.304541729:2(409-422)Online publication date: Feb-2021
    • (2020)Low Power, High Performance CNTFET-Based SRAM Cell DesignsMajor Applications of Carbon Nanotube Field-Effect Transistors (CNTFET)10.4018/978-1-7998-1393-4.ch006(93-128)Online publication date: 2020
    • (2020)CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116395(963-966)Online publication date: Mar-2020
    • (2020)Analysis of the Impact of Process Variations and Manufacturing Defects on the Performance of Carbon-Nanotube FETsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.2976734(1-14)Online publication date: 2020
    • (2020)Heterogeneous 3D Nano-systems: The N3XT Approach?NANO-CHIPS 203010.1007/978-3-030-18338-7_9(127-151)Online publication date: 9-Jun-2020
    • (2019)Exploring emerging CNFET for efficient last level cache designProceedings of the 24th Asia and South Pacific Design Automation Conference10.1145/3287624.3287700(426-431)Online publication date: 21-Jan-2019
    • (2019)Design of memristor based low power and highly reliable ReRAM cellMicrosystem Technologies10.1007/s00542-019-04582-128:3(793-807)Online publication date: 13-Aug-2019
    • (2018)Variation-Aware Global Placement for Improving Timing-Yield of Carbon-Nanotube Field Effect Transistor CircuitACM Transactions on Design Automation of Electronic Systems10.1145/317550023:4(1-27)Online publication date: 11-Jun-2018
    • (2018)CNFET-Based High Throughput SIMD ArchitectureIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.269589937:7(1331-1344)Online publication date: Jul-2018
    • (2018)Dielectric based charge carrier tuning for CNT CMOS invertersSemiconductor Science and Technology10.1088/1361-6641/aaf17d34:1(015015)Online publication date: 10-Dec-2018
    • Show More Cited By

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media