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GRIP: scalable 3D global routing using integer programming

Published: 26 July 2009 Publication History

Abstract

We propose GRIP, a scalable global routing technique via Integer Programming (IP). GRIP optimizes wirelength and via cost without going through a layer assignment phase. GRIP selects the route for each net from a set of candidate routes that are generated based on an estimate of congestion generated by a linear programming pricing phase. To achieve scalability, the original IP is decomposed into smaller ones corresponding to balanced rectangular subregions on the chip. We introduce the concept of a floating terminal for a net, which allows flexibility to route long nets going through multiple subregions. We also use the IP to plan the routing of long nets, detouring them from congested subregions. For ISPD 2007 benchmarks, we obtain 3.9% and 11.3% average improvement in wirelength and via cost for the 2D and 3D versions respectively, compared to the best results reported in the open literature.

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  • (2024)A fast and high-performance global router with enhanced congestion controlIntegration10.1016/j.vlsi.2024.102263(102263)Online publication date: Aug-2024
  • (2023)FastGR: Global Routing on CPU–GPU With Heterogeneous Task Graph SchedulerIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321766842:7(2317-2330)Online publication date: Jul-2023
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    cover image ACM Conferences
    DAC '09: Proceedings of the 46th Annual Design Automation Conference
    July 2009
    994 pages
    ISBN:9781605584973
    DOI:10.1145/1629911
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    Published: 26 July 2009

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    Author Tags

    1. global routing
    2. integer programming

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    • (2024)A Multi-agent Generative Model for Collaborative Global Routing RefinementProceedings of the Great Lakes Symposium on VLSI 202410.1145/3649476.3658721(383-389)Online publication date: 12-Jun-2024
    • (2024)A fast and high-performance global router with enhanced congestion controlIntegration10.1016/j.vlsi.2024.102263(102263)Online publication date: Aug-2024
    • (2023)FastGR: Global Routing on CPU–GPU With Heterogeneous Task Graph SchedulerIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321766842:7(2317-2330)Online publication date: Jul-2023
    • (2023)Incremental 3-D Global Routing Considering Cell Movement and Complex Routing ConstraintsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321049342:6(2016-2029)Online publication date: Jun-2023
    • (2023)COALA: Concurrently Assigning Wire Segments to Layers for 2-D Global RoutingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.317835342:2(569-582)Online publication date: Feb-2023
    • (2023)Pathfinding Model and Lagrangian-Based Global Routing2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247969(1-6)Online publication date: 9-Jul-2023
    • (2023)EDGE: Efficient DAG-based Global Routing Engine2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247702(1-6)Online publication date: 9-Jul-2023
    • (2022)Congestion-Aware Rectilinear Steiner Tree Construction Using PB-SATJournal of Circuits, Systems and Computers10.1142/S021812662250165131:09Online publication date: 5-Mar-2022
    • (2022)TritonRoute-WXL: The Open-Source Router With Integrated DRC EngineIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.307926841:4(1076-1089)Online publication date: Apr-2022
    • (2022)SPRoute 2.0: A detailed-routability-driven deterministic parallel global router with soft capacity2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASP-DAC52403.2022.9712557(586-591)Online publication date: 17-Jan-2022
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