research-article

Non-deterministic processors: FPGA-based analysis of area, performance and security

Authors:

Philipp Grabher,

Johann Großschädl,

Dan PageAuthors Info & Claims

WESS '09: Proceedings of the 4th Workshop on Embedded Systems Security

Article No.: 1, Pages 1 - 10

https://doi.org/10.1145/1631716.1631717

Published: 15 October 2009 Publication History

Abstract

Finding a suitable balance between performance and physical security can be a significant challenge when implementing cryptographic software. Although asymmetric primitives often afford inexpensive countermeasures against side-channel attack as a result of flexibility in the underlying mathematics, symmetric primitives are generally not as fortunate. The previously proposed NONDET processor architecture attempts to address this problem by securing generic workloads via micro-architectural countermeasures against DPA attack; in this paper we present the first concrete investigation of NONDET using AES as a case study. Our results indicate that versus an implementation of AES with no countermeasures, NONDET can significantly increase the number of acquisitions required for a successful DPA attack. Alternatively, versus an implementation using traditional software-based countermeasures such as randomisation and masking, NONDET can produce significant improvements in performance and memory footprint.

References

[1]

J. A. Ambrose, R. G. Ragel and S. Parameswaran. RIJID: Random Code Injection to Mask Power Analysis Based Side Channel Attacks. In ACM IEEE Design Automation Conference (DAC), 489--492, 2007.

Digital Library

[2]

E. Brier, C. Clavier and F. Olivier. Correlation Power Analysis with a Leakage Model. In Cryptographic Hardware and Embedded Systems (CHES), Springer-Verlag LNCS 3156, 135--152, 2004.

[3]

C. Clavier, J.-S. Coron, N. Dabbous. Differential Power Analysis in the Presence of Hardware Countermeasures. In Cryptographic Hardware and Embedded Systems (CHES), Springer-Verlag LNCS 1965, 252--263, 2000.

Digital Library

[4]

J. Daemen and V. Rijmen. The Design of Rijndael. Springer-Verlag, 2002.

Digital Library

[5]

C. Herbst, E. Oswald and S. Mangard. An AES Smart Card Implementation Resistant to Power Analysis Attacks. In Applied Cryptography and Network Security (ACNS), Springer-Verlag LNCS 3989, 239--252, 2006.

Digital Library

[6]

J. Irwin, H. L. Muller, D. Page, N. P. Smart and B. W. Silverman. Probabilistic Instruction Execution: The MAYBE Predicate. Technical Report CSTR-03-005, Department of Computer Science, University of Bristol, 2003.

[7]

J. Irwin and D. Page and N. P. Smart. Instruction Stream Mutation for Non-Deterministic Processors. In IEEE Application-specific Systems, Architectures and Processors (ASAP), 286--295, 2002.

Digital Library

[8]

M. Joye, P. Paillier, B. Schoenmakers. On Second-Order Differential Power Analysis. In Cryptographic Hardware and Embedded Systems (CHES), Springer-Verlag LNCS 3659, 293--308, 2005.

Digital Library

[9]

P. C. Kocher. Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems. In Advances in Cryptology (CRYPTO), Springer-Verlag LNCS 1109, 104--113, 1996.

Digital Library

[10]

P. C. Kocher, J. Jaffe and B. Jun. Differential Power Analysis. In Advances in Cryptology (CRYPTO), Springer-Verlag LNCS 1666, 388--397, 1999.

Digital Library

[11]

P. C. Kocher, R. B. Lee, G. McGraw and A. Raghunathan. Security as a New Dimension in Embedded System Design. In ACM/IEEE Design Automation Conference (DAC), 753--760, 2004.

Digital Library

[12]

P. Leadbitter, D. Page and N. P. Smart. Non-deterministic Multi-threading. In IEEE Transactions on Computers, 56 (7), 992--998, 2007.

Digital Library

[13]

S. Mangard, E. Oswald, T. Popp. Power Analysis Attacks: Revealing the Secrets of Smart Cards. Springer-Verlag, 2007.

Digital Library

[14]

D. May, H. L. Muller and N. P. Smart. Non-deterministic Processors. In Information Security and Privacy (ACISP), Springer-Verlag LNCS 2119, 115--129, 2001.

Digital Library

[15]

D. May, H. L. Muller and N. P. Smart. Random Register Renaming to Foil DPA. In Cryptographic Hardware and Embedded Systems (CHES), Springer-Verlag LNCS 2162, 28--38, 2001.

Digital Library

[16]

S. Mangard. Hardware Countermeasures against DPA: A Statistical Analysis of Their Effectiveness. In Topics in Cryptology (CT-RSA), Springer-Verlag LNCS 2964, 222--235, 2004.

[17]

OpenSCA. Available at: http://www.cs.bris.ac.uk/home/eoswald/opensca.html

[18]

D. Page and N. Sidwell. A Fetch Resident Split Jump Mechanism for Non-Deterministic Processors. Technical Report CSTR-01-007, Department of Computer Science, University of Bristol, 2001.

[19]

S. Ravi, A. Raghunathan, P. C. Kocher and S. Hattangady. Security in Embedded Systems: Design Challenges. In ACM Transactions on Embedded Computing Systems (TECS), 3 (3), 461--491, 2004.

Digital Library

[20]

Serial to AMBA APB Interface Converter. Available at: http://www.iaik.tugraz.at/research/vlsi

[21]

Side-channel Attack Standard Evaluation Board (SASEBO), Available at: http://www.rcis.aist.go.jp/special/SASEBO/index-en.html

[22]

S. Tillich and C. Herbst. Attacking State-of-the-Art Software Countermeasures: A Case Study for AES. In Cryptographic Hardware and Embedded Systems (CHES), Springer-Verlag LNCS 5154, 228--243, 2008.

Digital Library

[23]

K. Tiri, M. Akmal and I. Verbauwhede. A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards. In European Solid-State Circuits Conference (ESSCIRC), 403--406, 2002.

[24]

K. Tiri and I. Verbauwhede. A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. In Design, Automation and Test in Europe Conference (DATE), 246--251, 2004.

Digital Library

Cited By

Liptak CMal-Sarkar SKumar S(2022)Power Analysis Side Channel Attacks and Countermeasures for the Internet of Things2022 IEEE Physical Assurance and Inspection of Electronics (PAINE)10.1109/PAINE56030.2022.10014854(1-7)Online publication date: 25-Oct-2022
https://doi.org/10.1109/PAINE56030.2022.10014854
Shanmugham SParamasivam S(2018)Survey on power analysis attacks and its impact on intelligent sensor networksIET Wireless Sensor Systems10.1049/iet-wss.2018.51578:6(295-304)Online publication date: 12-Nov-2018
https://doi.org/10.1049/iet-wss.2018.5157
Halak BHalak B(2018)Security Attacks on Physically Unclonable Functions and Possible CountermeasuresPhysically Unclonable Functions10.1007/978-3-319-76804-5_5(131-182)Online publication date: 19-Apr-2018
https://doi.org/10.1007/978-3-319-76804-5_5
Show More Cited By

Index Terms

Non-deterministic processors: FPGA-based analysis of area, performance and security

Recommendations

Security beyond cybersecurity: side-channel attacks against non-cyber systems and their countermeasures
Abstract
Side-channels are unintended pathways within target systems that leak internal information, exploitable via side-channel attack techniques that extract the target information, compromising the system’s security and privacy. Side-channel attacks ...
Informer: Protecting Intel SGX from Cross-Core Side Channel Threats
Information and Communications Security
Abstract
As one of the major threats facing Intel SGX, side-channel attacks have been widely researched and disclosed as actual vulnerabilities in recent years, which can severely harm the integrity and confidentiality of programs protected by SGX. Most ...
Hardware-Assisted Circumvention of Self-Hashing Software Tamper Resistance

Self-hashing has been proposed as a technique for verifying software integrity. Appealing aspects of this approach to software tamper resistance include the promise of being able to verify the integrity of software independent of the external support ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

WESS '09: Proceedings of the 4th Workshop on Embedded Systems Security

October 2009

79 pages

ISBN:9781605587004

DOI:10.1145/1631716

Conference Chairs:
Dimitrios Serpanos,
Wayne Wolf

Copyright © 2009 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

CEDA: Council on Electronic Design Automation
SIGBED: ACM Special Interest Group on Embedded Systems
SIGDA: ACM Special Interest Group on Design Automation
IEEE CAS
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
IEEE CS

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 October 2009

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Funding Sources

Engineering and Physical Sciences Research Council

Conference

ESWeek '09

Sponsor:

ESWeek '09: Fifth Embedded Systems Week

October 15, 2009

Grenoble, France

Acceptance Rates

Overall Acceptance Rate 8 of 21 submissions, 38%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

13
Total Citations
View Citations
293
Total Downloads

Downloads (Last 12 months)6
Downloads (Last 6 weeks)2

Reflects downloads up to 27 Feb 2025

Other Metrics

View Author Metrics

Citations

Cited By

Liptak CMal-Sarkar SKumar S(2022)Power Analysis Side Channel Attacks and Countermeasures for the Internet of Things2022 IEEE Physical Assurance and Inspection of Electronics (PAINE)10.1109/PAINE56030.2022.10014854(1-7)Online publication date: 25-Oct-2022
https://doi.org/10.1109/PAINE56030.2022.10014854
Shanmugham SParamasivam S(2018)Survey on power analysis attacks and its impact on intelligent sensor networksIET Wireless Sensor Systems10.1049/iet-wss.2018.51578:6(295-304)Online publication date: 12-Nov-2018
https://doi.org/10.1049/iet-wss.2018.5157
Halak BHalak B(2018)Security Attacks on Physically Unclonable Functions and Possible CountermeasuresPhysically Unclonable Functions10.1007/978-3-319-76804-5_5(131-182)Online publication date: 19-Apr-2018
https://doi.org/10.1007/978-3-319-76804-5_5
Shanmugam DAnnadurai S(2016)Secure Implementation of Stream Cipher: TriviumInnovative Security Solutions for Information Technology and Communications10.1007/978-3-319-27179-8_18(253-266)Online publication date: 15-Jan-2016
https://doi.org/10.1007/978-3-319-27179-8_18
Malagón Pde Goyeneche JFraga DMoya JKoubias SSauter T(2015)Bitslice software implementation of KeeLoq as a side-channel countermeasureProceedings of the WESS'15: Workshop on Embedded Systems Security10.1145/2818362.2818366(1-8)Online publication date: 4-Oct-2015
https://dl.acm.org/doi/10.1145/2818362.2818366
Khedkar GKudithipudi DRose G(2015)Power Profile Obfuscation Using Nanoscale Memristive Devices to Counter DPA AttacksIEEE Transactions on Nanotechnology10.1109/TNANO.2014.236241614:1(26-35)Online publication date: Jan-2015
https://doi.org/10.1109/TNANO.2014.2362416
Mansouri SDubrova E(2013)Double-Edge Transformation for Optimized Power Analysis Suppression CountermeasuresProceedings of the 2013 Euromicro Conference on Digital System Design10.1109/DSD.2013.45(353-359)Online publication date: 4-Sep-2013
https://dl.acm.org/doi/10.1109/DSD.2013.45
Malagón PDe Goyeneche JZapater MMoya JBanković Z(2012)Compiler Optimizations as a Countermeasure against Side-Channel Analysis in MSP430-Based DevicesSensors10.3390/s12060799412:6(7994-8012)Online publication date: 8-Jun-2012
https://doi.org/10.3390/s120607994
Sharif Mansouri SDubrova EAtienza DXie YAyala JStevens K(2011)A countermeasure against power analysis attacks for FSR-based stream ciphersProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973056(235-240)Online publication date: 2-May-2011
https://dl.acm.org/doi/10.1145/1973009.1973056
Krieg AGrinschgl JSteger CWeiss RHaid J(2011)A side channel attack countermeasure using system-on-chip power profile scramblingProceedings of the 2011 IEEE 17th International On-Line Testing Symposium10.1109/IOLTS.2011.5993849(222-227)Online publication date: 13-Jul-2011
https://dl.acm.org/doi/10.1109/IOLTS.2011.5993849
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Figures

Tables

Media

View Table of Conten