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Task management in MPSoCs: an ASIP approach

Published: 02 November 2009 Publication History

Abstract

Scheduling, mapping and synchronization have an essential impact on the performance of Multi-Processor System-on-Chips (MPSoCs), especially in heterogeneous systems with many cores and small tasks. This paper presents a technique to efficiently accelerate these operations. Key contribution is an Application-Specific Instruction-set Processor (ASIP) called OSIP which is especially tailored to achieve this. In contrast to pure HW solutions, OSIP is programmable and hence features higher flexibility and better scalability. OSIP comes with a compiler and a firmware that ease its usability, and an abstract formal model that allows analytical evaluation and integration into fast system level simulators. Together with OSIP, a thin software layer is proposed that leverages high level multi-task programming by abstracting OSIP's low level details away. In an extensive case study based on a synthetic benchmark and a benchmark from the multimedia domain (H.264), OSIP highlights its potential when compared against a standard RISC and an ARM926-EJS processor.

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cover image ACM Conferences
ICCAD '09: Proceedings of the 2009 International Conference on Computer-Aided Design
November 2009
803 pages
ISBN:9781605588001
DOI:10.1145/1687399
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 02 November 2009

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Author Tags

  1. ASIP
  2. CAD for systems
  3. MPSoC scheduling and mapping
  4. embedded systems

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