research-article

Automatically generating instruction selectors using declarative machine descriptions

Authors:

Norman RamseyAuthors Info & Claims

POPL '10: Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages

Pages 403 - 416

https://doi.org/10.1145/1706299.1706346

Published: 17 January 2010 Publication History

Abstract

Despite years of work on retargetable compilers, creating a good, reliable back end for an optimizing compiler still entails a lot of hard work. Moreover, a critical component of the back end---the instruction selector---must be written by a person who is expert in both the compiler's intermediate code and the target machine's instruction set. By generating the instruction selector from declarative machine descriptions we have (a) made it unnecessary for one person to be both a compiler expert and a machine expert, and (b) made creating an optimizing back end easier than ever before.

Our achievement rests on two new results. First, finding a mapping from intermediate code to machine code is an undecidable problem. Second, using heuristic search, we can find mappings for machines of practical interest in at most a few minutes of CPU time.

Our most significant new idea is that heuristic search should be controlled by algebraic laws. Laws are used not only to show when a sequence of instructions implements part of an intermediate code, but also to limit the search: we drop a sequence of instructions not when it gets too long or when it computes too complicated a result, but when too much reasoning will be required to show that the result computed might be useful.

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Huang BLyubomirsky SLi YHe MSmith GTambe TGaonkar ACanumalla VCheung AWei GGupta ATatlock ZMalik S(2024)Application-level Validation of Accelerator Designs Using a Formal Software/Hardware InterfaceACM Transactions on Design Automation of Electronic Systems10.1145/363905129:2(1-25)Online publication date: 14-Feb-2024
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VanHattum APardeshi MFallin CSampson ABrown FTsafrir DMUSUVATHI MGupta RAbu-Ghazaleh N(2024)Lightweight, Modular Verification for WebAssembly-to-Native Instruction SelectionProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 110.1145/3617232.3624862(231-248)Online publication date: 27-Apr-2024
https://dl.acm.org/doi/10.1145/3617232.3624862
Nandi CWillsey MZhu AWang YSaiki BAnderson ASchulz AGrossman DTatlock Z(2021)Rewrite rule inference using equality saturationProceedings of the ACM on Programming Languages10.1145/34854965:OOPSLA(1-28)Online publication date: 15-Oct-2021
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Index Terms

Automatically generating instruction selectors using declarative machine descriptions
1. Software and its engineering
  1. Software notations and tools
    1. Compilers
      1. Retargetable compilers
      2. Source code generation

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cover image ACM Conferences

POPL '10: Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages

January 2010

520 pages

ISBN:9781605584799

DOI:10.1145/1706299

General Chair:
Manuel Hermenegildo
IMDEA-Software and T.U. of Madrid, Spain
,
Program Chair:
Jens Palsberg
UCLA, University of California, Los Angeles

ACM SIGPLAN Notices Volume 45, Issue 1
POPL '10
January 2010
500 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/1707801
Issue’s Table of Contents

Copyright © 2010 ACM.

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Published: 17 January 2010

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POPL '10: The 37th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages

January 17 - 23, 2010

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Cited By

Huang BLyubomirsky SLi YHe MSmith GTambe TGaonkar ACanumalla VCheung AWei GGupta ATatlock ZMalik S(2024)Application-level Validation of Accelerator Designs Using a Formal Software/Hardware InterfaceACM Transactions on Design Automation of Electronic Systems10.1145/363905129:2(1-25)Online publication date: 14-Feb-2024
https://dl.acm.org/doi/10.1145/3639051
VanHattum APardeshi MFallin CSampson ABrown FTsafrir DMUSUVATHI MGupta RAbu-Ghazaleh N(2024)Lightweight, Modular Verification for WebAssembly-to-Native Instruction SelectionProceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 110.1145/3617232.3624862(231-248)Online publication date: 27-Apr-2024
https://dl.acm.org/doi/10.1145/3617232.3624862
Nandi CWillsey MZhu AWang YSaiki BAnderson ASchulz AGrossman DTatlock Z(2021)Rewrite rule inference using equality saturationProceedings of the ACM on Programming Languages10.1145/34854965:OOPSLA(1-28)Online publication date: 15-Oct-2021
https://dl.acm.org/doi/10.1145/3485496
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Buchwald SFried AHack SKnoop JSchordan MJohnson TO'Boyle M(2018)Synthesizing an instruction selection rule library from semantic specificationsProceedings of the 2018 International Symposium on Code Generation and Optimization10.1145/3168821(300-313)Online publication date: 24-Feb-2018
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Flur SGray KPulte CSarkar SSezgin AMaranget LDeacon WSewell P(2016)Modelling the ARMv8 architecture, operationally: concurrency and ISAACM SIGPLAN Notices10.1145/2914770.283761551:1(608-621)Online publication date: 11-Jan-2016
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Flur SGray KPulte CSarkar SSezgin AMaranget LDeacon WSewell PBodik RMajumdar R(2016)Modelling the ARMv8 architecture, operationally: concurrency and ISAProceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages10.1145/2837614.2837615(608-621)Online publication date: 11-Jan-2016
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Morrisett GTan GTassarotti JTristan JGan E(2012)RockSaltACM SIGPLAN Notices10.1145/2345156.225411147:6(395-404)Online publication date: 11-Jun-2012
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Morrisett GTan GTassarotti JTristan JGan EVitek JLin HTip F(2012)RockSaltProceedings of the 33rd ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/2254064.2254111(395-404)Online publication date: 11-Jun-2012
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