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On the efficacy of call graph-level thread-level speculation

Published: 28 January 2010 Publication History

Abstract

Thread-level speculation (TLS) has been proposed as a means to parallelize difficult-to-analyze sequential codes. In this paper, we present a realistic measure of the performance potential of call-graph level TLS, using the SPEC CPU2006 benchmark suite and the Intel Core 2 Duo processor.

References

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A. Kejariwal and A. Nicolau. Reading list of performance analysis, speculative execution. http://www.ics.uci.edu/~akejariw/SpeculativeExecutionReadingList.pdf.
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A. Kejariwal, X. Tian, M. Girkar, W. Li, S. Kozhukhov, H. Saito, U. Banerjee, A. Nicolau, A.V. Veidenbaum, and C.D. Polychronopoulos. Tight analysis of the performance potential of thread speculation using SPEC CPU2006. In PPoPP, 2007.
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SPEC CPU2006. http://www.spec.org/cpu2006.
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M.K. Chen and K. Olukotun. Exploiting method-level parallelism in single-threaded Java programs. In PACT, 1998.
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M. Franklin. Multi-version caches for multiscalar processors. In Proceedings of 1st International Conference on High Performance Computing, 1995.
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S. Gopal, T.N. Vijaykumar, J. Smith, and G. Sohi. Speculative versioning cache. In HPCA, 1998.
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M. J. Garzarán, M. Prvulovic, M. Llabería J, V. Viñals, L. Rauchwerger, and J. Torrellas. Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. ACM TACO, 2(3):247--279, 2005.
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S.W. Kim, C.-L. Ooi, R. Eigenmann, B. Falsafi, and T.N. Vijaykumar. Exploiting reference idempotency to reduce speculative storage overflow. ACM TOPLAS, 28(5):942--965, 2006.

Cited By

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  • (2016)A Survey on Thread-Level Speculation TechniquesACM Computing Surveys10.1145/293836949:2(1-39)Online publication date: 30-Jun-2016
  • (2010)Exploitation of nested thread-level speculative parallelism on multi-core systemsProceedings of the 7th ACM international conference on Computing frontiers10.1145/1787275.1787302(99-100)Online publication date: 17-May-2010

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      cover image ACM Conferences
      WOSP/SIPEW '10: Proceedings of the first joint WOSP/SIPEW international conference on Performance engineering
      January 2010
      294 pages
      ISBN:9781605585635
      DOI:10.1145/1712605

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      Published: 28 January 2010

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      Author Tags

      1. performance
      2. thread-level speculation

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      View all
      • (2016)A Survey on Thread-Level Speculation TechniquesACM Computing Surveys10.1145/293836949:2(1-39)Online publication date: 30-Jun-2016
      • (2010)Exploitation of nested thread-level speculative parallelism on multi-core systemsProceedings of the 7th ACM international conference on Computing frontiers10.1145/1787275.1787302(99-100)Online publication date: 17-May-2010

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