research-article

Logical and physical restructuring of fan-in trees

Authors:

Louise Trevillyan,

Minsik ChoAuthors Info & Claims

ISPD '10: Proceedings of the 19th international symposium on Physical design

Pages 67 - 74

https://doi.org/10.1145/1735023.1735046

Published: 14 March 2010 Publication History

Abstract

A symmetric-function fan-in tree (SFFT) is a fanout-free cone of logic that computes a symmetric function, so that all of the leaf nets in its support set are commutative. Such trees are frequently found in designs, especially when the design originated as two-level logic.

These trees are usually created during logic synthesis, when there is no knowledge of the locations of the tree root or of the source gates of the leaf nets. Because of this, large SFFTs present a challenge to placement algorithms. The result is that the tree placements are generally far from optimal, leading to wiring congestion, excess buffering, and timing problems. Restructuring such trees can produce a more placeable and wire-efficient design.

In this paper, we propose algorithms to identify and to restructure SFFTs during physical design. The key feature of an SFFT is that it can be implemented with various structures of a uniform set of gates with commutative inputs, i.e. AND, OR, or XOR. Drawing on the flexibility of SFFT logic structures, the proposed tree restructuring algorithm uses existing placement information to rebuild the SFFTs with reduced tree wire lengths. The experimental results demonstrate the efficiency and effectiveness of the algorithms.

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Cited By

Held SKämmerling N(2017)Two-level rectilinear Steiner treesComputational Geometry: Theory and Applications10.1016/j.comgeo.2016.11.00261:C(48-59)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1016/j.comgeo.2016.11.002
Khatri SShenoy NGiomi JKhouja A(2016)Logic SynthesisElectronic Design Automation for IC Implementation, Circuit Design, and Process Technology10.1201/b19714-4(27-55)Online publication date: 14-Apr-2016
https://doi.org/10.1201/b19714-4
Markov IHu JKim M(2015)Progress and Challenges in VLSI Placement ResearchProceedings of the IEEE10.1109/JPROC.2015.2478963103:11(1985-2003)Online publication date: Nov-2015
https://doi.org/10.1109/JPROC.2015.2478963
Show More Cited By

Index Terms

Logical and physical restructuring of fan-in trees
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design
2. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Partitioning and floorplanning

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cover image ACM Conferences

ISPD '10: Proceedings of the 19th international symposium on Physical design

March 2010

220 pages

ISBN:9781605589206

DOI:10.1145/1735023

General Chair:
Prashant Saxena
Synopsys
,
Program Chair:
Yao-Wen Chang
National Taiwan University

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 14 March 2010

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ISPD '10: International Symposium on Physical Design

March 14 - 17, 2010

California, San Francisco, USA

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ISPD '10 Paper Acceptance Rate 22 of 70 submissions, 31%;

Overall Acceptance Rate 62 of 172 submissions, 36%

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Cited By

Held SKämmerling N(2017)Two-level rectilinear Steiner treesComputational Geometry: Theory and Applications10.1016/j.comgeo.2016.11.00261:C(48-59)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1016/j.comgeo.2016.11.002
Khatri SShenoy NGiomi JKhouja A(2016)Logic SynthesisElectronic Design Automation for IC Implementation, Circuit Design, and Process Technology10.1201/b19714-4(27-55)Online publication date: 14-Apr-2016
https://doi.org/10.1201/b19714-4
Markov IHu JKim M(2015)Progress and Challenges in VLSI Placement ResearchProceedings of the IEEE10.1109/JPROC.2015.2478963103:11(1985-2003)Online publication date: Nov-2015
https://doi.org/10.1109/JPROC.2015.2478963
Xiang HReddy LTrevillyan LPuri RHenkel J(2013)Depth controlled symmetric function fanin tree restructureProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561945(585-591)Online publication date: 18-Nov-2013
https://dl.acm.org/doi/10.5555/2561828.2561945
Xiang HReddy LTrevillyan LPuri R(2013)Depth controlled symmetric function fanin tree restructure2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2013.6691176(585-591)Online publication date: Nov-2013
https://doi.org/10.1109/ICCAD.2013.6691176
Xing Wei Wai-Chung Tang Yu-Liang Wu Sze CAlpert C(2013)Mountain-mover: An intuitive logic shifting heuristic for improving timing slack violating paths2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2013.6509620(350-355)Online publication date: Jan-2013
https://doi.org/10.1109/ASPDAC.2013.6509620
Markov IHu JKim MHu A(2012)Progress and challenges in VLSI placement researchProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429441(275-282)Online publication date: 5-Nov-2012
https://dl.acm.org/doi/10.1145/2429384.2429441
Li ZAlpert CNam GSze CViswanathan NZhou NGroeneveld PSciuto DHassoun S(2012)Guiding a physical design closure system to produce easier-to-route designs with more predictable timingProceedings of the 49th Annual Design Automation Conference10.1145/2228360.2228442(465-470)Online publication date: 3-Jun-2012
https://dl.acm.org/doi/10.1145/2228360.2228442
Alpert CLi ZMoffitt MNam GRoy JTellez GSaxena PChang Y(2010)What makes a design difficult to routeProceedings of the 19th international symposium on Physical design10.1145/1735023.1735028(7-12)Online publication date: 14-Mar-2010
https://dl.acm.org/doi/10.1145/1735023.1735028

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