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Power-efficient, reliable microprocessor architectures: modeling and design methods

Published: 16 May 2010 Publication History

Abstract

Next generation system designs are challenged by multiple "walls": among them, the inter-related impediments offered by power dissipation limits and reliability are particularly difficult ones that all current chip/system design teams are grappling with. In this paper, we first describe the attendant challenges in integrated (multi-dimensional) pre-silicon modeling and the solution approaches being pursued. Later, we focus on leading edge solutions for power, thermal and failure-rate mitigation that have been proposed in our R&D work over the past decade.

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Cited By

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  • (2021)Power-Efficient Heterogeneous Many-Core Design With NCFET TechnologyIEEE Transactions on Computers10.1109/TC.2020.301356770:9(1484-1497)Online publication date: 1-Sep-2021
  • (2011)Error Tolerance in Server Class ProcessorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2011.215810030:7(945-959)Online publication date: 1-Jul-2011

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      cover image ACM Conferences
      GLSVLSI '10: Proceedings of the 20th symposium on Great lakes symposium on VLSI
      May 2010
      502 pages
      ISBN:9781450300124
      DOI:10.1145/1785481
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 16 May 2010

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      Author Tags

      1. power-efficient design
      2. pre-silicon modeling
      3. reliable operation

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      May 16 - 18, 2010
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      • (2021)Power-Efficient Heterogeneous Many-Core Design With NCFET TechnologyIEEE Transactions on Computers10.1109/TC.2020.301356770:9(1484-1497)Online publication date: 1-Sep-2021
      • (2011)Error Tolerance in Server Class ProcessorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2011.215810030:7(945-959)Online publication date: 1-Jul-2011

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