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The correlation between parallel patterns and multi-core benchmarks

Published:01 May 2010Publication History

ABSTRACT

Parallel Patterns can be thought of as standard solutions used to evaluate parallelism used in software. Multi-core benchmarks can be thought of as standard codes used for evaluating parallelism in hardware. In this document, we discuss the relationship and synergy between the ongoing development of parallel patterns and multi-core benchmarks, specifically discussing how they both can be beneficial to one another.

References

  1. S. Kamil, C. Chan, S. Williams, et al. Wes Bethel, Prabhat, "A Generalized Framework for Auto-tuning Stencil Computations", Cray User Group (CUG) 2009Google ScholarGoogle Scholar
  2. Singh, J. P. Kumar, S. et al. "The PARSEC Benchmark Suite: Characterization and Architectural Implications." Proceedings of the 17th international conference on Parallel architectures and compilation techniques (PACT) 2009Google ScholarGoogle Scholar
  3. Johnson, Kuetzer, Mattson et al. Our Pattern Language. 2009. http://parlab.eecs.berkeley.edu/wiki/patterns/patternsGoogle ScholarGoogle Scholar
  4. Wijngaart, V. "NAS Parallel Benchmarks: Multi-Zone Versions." NAS Technical Report 03-010. July 2003Google ScholarGoogle Scholar

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  1. The correlation between parallel patterns and multi-core benchmarks

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    • Published in

      cover image ACM Conferences
      IWMSE '10: Proceedings of the 3rd International Workshop on Multicore Software Engineering
      May 2010
      72 pages
      ISBN:9781605589640
      DOI:10.1145/1808954

      Copyright © 2010 ACM

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      New York, NY, United States

      Publication History

      • Published: 1 May 2010

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