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Timing analysis of esterel programs on general-purpose multiprocessors

Published: 13 June 2010 Publication History

Abstract

Synchronous languages like Esterel have gained wide popularity in certain domains such as avionics. However, platform-specific timing analysis of code generated from Esterel-like specifications have mostly been neglected so far. The growing volume of electronics and software in domains like automotive, calls for formal-specification based code generation to replace manually written and optimized code. Such cost-sensitive domains require tight estimation of timing properties of the generated code. Towards this goal, we propose a scheme for generating C code from Esterel specifications for a multiprocessor platform, followed by timing analysis of the generated code. Due to dependencies across program fragments mapped onto different processors, traditional Worst-Case Execution Time (WCET) analysis techniques for sequential programs cannot applied be to this setting. Our proposed timing analysis technique is tailored to capture such inter-processor code dependencies. Our main novelty stems from how we detect and remove infeasible paths arising from a multiprocessor implementation during our timing analysis. We apply our timing analysis on a number of standard Esterel benchmarks, which show that performing the proposed inter-processor infeasible path elimination may lead to up to 14.3% tighter estimation of the WCRT, thereby leading to resource over-dimensioning and poor design.

References

[1]
V. Bertin et al. TAXYS = Esterel + Kronos. A tool for verifying real-time properties of embedded systems. In CDC, 2001.
[2]
M. Boldt, C. Traulsen, and R. von Hanxleden. Worst case reaction time analysis of concurrent reactive programs. Electronic Notes in Theoretical Computer Science (ENTCS), 203(4):65--79, 2008.
[3]
F. Boussinot and R. de Simone. The Esterel language. Proceedings of the IEEE, 9(79):1270--1282, 1991.
[4]
S. A. Edwards. The Estbench Esterel benchmark suite. http://www1.cs.columbia.edu/sedwards/software.html, 2003.
[5]
S. A. Edwards and J. Zeng. Code generation in the Columbia Esterel compiler. EURASIP Journal on Embedded Systems, 2007.
[6]
R. Heckmann et al. Combining a high-level design tool for safety-critical systems with a tool for WCET analysis on executables. In ERTS, 2008.
[7]
A. Girault. A survey of automatic distribution method for synchronous programs. In SLAP, 2005.
[8]
L. Ju, B. K. Huynh, S. Chakraborty, and A. Roychoudhury. Context-sensitive timing analysis of Esterel programs. In DAC, 2009.
[9]
L. Ju, B. K. Huynh, A. Roychoudhury, and S. Chakraborty. Performance debugging of Esterel specifications. In CODES-ISSS, 2008.
[10]
G. Logothetis, K. Schneider, and C. Metzler. Generating formal models for real-time verification by exact low-level runtime analysis of synchronous programs. In RTSS, 2003.
[11]
M. Mendler, R. von Hanxleden, and C. Traulsen. WCRT algebra and interfaces for Esterel-style synchronous processing. In DATE, 2009.
[12]
D. Potop-Butucaru, S. A. Edwards, and G. Berry. Compiling ESTEREL. Springer, 2007.
[13]
R. K. Shyamasundar and J. V. Aghav. Realizing real-time systems from synchronous language specifications. In RTSS Work-in-Progress Session, 2000.
[14]
H. Theiling, C. Ferdinand, and R. Wilhelm. Fast and precise WCET prediction by separated cache and path analyses. Real-Time Systems, 18(2):157--179, 2000.
[15]
L. H. Yoong, P. Roop, Z. Salcic, and F. Gruian. Compiling Esterel for distributed execution. In SLAP, 2006.

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      cover image ACM Conferences
      DAC '10: Proceedings of the 47th Design Automation Conference
      June 2010
      1036 pages
      ISBN:9781450300025
      DOI:10.1145/1837274
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      Published: 13 June 2010

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      Author Tags

      1. esterel
      2. multiprocessor
      3. synchronous language
      4. timing analysis

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      • (2024)Special Session: Emerging Architecture Design, Control, and Security Challenges in Software Defined Vehicles2024 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)10.1109/CODES-ISSS60120.2024.00014(27-36)Online publication date: 29-Sep-2024
      • (2023)Synchronous Deterministic Parallel Programming for Multi-Cores with ForeCACM Transactions on Programming Languages and Systems10.1145/359159445:2(1-74)Online publication date: 26-Jun-2023
      • (2023)Statistical Approach to Efficient and Deterministic Schedule Synthesis for Cyber-Physical SystemsAutomated Technology for Verification and Analysis10.1007/978-3-031-45329-8_15(312-333)Online publication date: 22-Oct-2023
      • (2019)Cross-Layer Interactions in CPS for Performance and Certification2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8715153(1439-1444)Online publication date: Mar-2019
      • (2016)The ForeC Synchronous Deterministic Parallel Programming Language for Multicores2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)10.1109/MCSoC.2016.13(297-304)Online publication date: Sep-2016
      • (2015)Reducing Worst Case Reaction Time of Synchronous Programs on Chip-multiprocessors with Application-Specific TDMA SchedulingProceedings of the 13th International Workshop on Java Technologies for Real-time and Embedded Systems10.1145/2822304.2822306(1-9)Online publication date: 7-Oct-2015
      • (2014)Timing challenges in automotive software architecturesCompanion Proceedings of the 36th International Conference on Software Engineering10.1145/2591062.2591138(606-607)Online publication date: 31-May-2014
      • (2014)Passive code in synchronous programsACM Transactions on Embedded Computing Systems10.1145/2544375.254438713:2s(1-25)Online publication date: 27-Jan-2014
      • (2013)Programming and Timing Analysis of Parallel Programs on MulticoresProceedings of the 2013 13th International Conference on Application of Concurrency to System Design10.1109/ACSD.2013.19(160-169)Online publication date: 8-Jul-2013
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