research-article

ACES: application-specific cycle elimination and splitting for deadlock-free routing on irregular network-on-chip

Authors:

Glenn ReinmanAuthors Info & Claims

DAC '10: Proceedings of the 47th Design Automation Conference

Pages 443 - 448

https://doi.org/10.1145/1837274.1837385

Published: 13 June 2010 Publication History

Abstract

Application-specific Network-on-Chip (NoC) in MPSoC designs often requires irregular topology to optimize power and performance. However, efficient deadlock-free routing, which avoids restricting critical routes and also does not significantly increase power for irregular NoC, has remained an open problem until now. In this paper an application-specific cycle elimination and splitting (ACES) method is presented for this problem. Based on the application-specific communication patterns, we propose a scalable algorithm using global optimization to eliminate as much channel dependency cycles as possible while ensuring shortest paths between heavily communicated nodes, and split only the remaining small set of cycles (if any). Experimental results show that compared to prior work, ACES can either reduce the NoC power by 11%~35% while maintaining approximately the same network performance, or improve the network performance by 10%~36% with slight NoC power overhead (-5%~7%) on a wide range of examples.

References

[1]

A. Pinto, L. P. Carloni and A. L. Sangiovanni-Vincentelli, "Efficient synthesis of networks on chip," In Proc. ICCD, pp. 146--150, Oct. 2003.

Digital Library

[2]

U. Y. Ogras and R. Marculescu, "Energy- and performance-driven NoC communication architecture synthesis using a decomposition approach," In Proc. DATE, pp. 352--357, Mar. 2005.

Digital Library

[3]

U. Y. Ogras and R. Marculescu, "It's a small world after all: NoC performance optimization via long-range link insertion," In IEEE Trans. VLSI Syst. - Special Section Hardware/Softw. Codesign Syst. Synthesis, vol. 14, no. 7, pp. 693--706, Jul. 2006.

Digital Library

[4]

M. F. Chang, J. Cong, A. Kaplan, M. Naik, G. Reinman, E. Socher and S. W. Tam, "CMP network-on-chip overlaid with multi-band RF-Interconnect," In Proc. HPCA, pp. 191--202, Feb. 2008.

[5]

M. F. Chang, J. Cong, A. Kaplan, C. Liu, M. Naik, J. Premkumar, G. Reinman, E. Socher, and R. Tam, "Power reduction of CMP communication networks via RF-Interconnects," In Proc. MICRO, pp. 376--387, Nov. 2008.

Digital Library

[6]

J. Duato and T. M. Pinkston, "A general theory for deadlock-free adaptive routing using a mixed set of resources," In IEEE Trans. Parallel and Distributed Systems, Vol. 12, Issue 12, pp. 1219--1235, Dec 2001.

Digital Library

[7]

D. Starobinski, M. Karpovsky, L. A. Zakrevski, "Application of network calculus to general topologies using turn-prohibition," In IEEE/ACM Trans. Networking, vol. 11, issue 3, pp. 411--421, 2003.

Digital Library

[8]

M. Palesi, R. Holsmark, S. Kumar and V. Catania, "Application specific routing algorithms for networks on chip," In IEEE Trans. Parallel and Distributed Systems, vol. 20, issue 3, pp. 316--330, March 2009.

Digital Library

[9]

J. Flich and J. Duato, "Logic-Based Distributed Routing for NoCs," In IEEE Computer Architecture Letters, vol. 7, Issue 1, pp. 13--16, Jan. 2008

Digital Library

[10]

M. Kinsy, M. H. Cho, T. Wen, E. Suh, M. Dijk, S. Devadas, "Application-Aware Deadlock-Free Oblivious Routing," in Proc. ISCA, pp. 208--219, 2009.

Digital Library

[11]

M. R. Garey and D. S. Johnson, Computers and intractability: a guide to theory of NP-completeness, W. H. Freeman, 1979.

Digital Library

[12]

C. Demetrescu, I. Finocchi, "Combinatorial algorithms for feedback problems in directed graphs," In Information Processing Letters, Vol. 86, Issue 3, pp. 129--136, May 2003.

Digital Library

[13]

N. Agarwal, L.-S. Peh, and N. Jha, "Garnet: A detailed interconnection network model inside a full-system simulation framework," Technical Report CE-P08-001, Dept. of Electrical Engineering, Princeton University, 2007.

[14]

A. Kahng, B. Li, L.-S. Peh and K. Samadi, "ORION 2.0: A Fast and Accurate NoC Power and Area Model for Early-Stage Design Space Exploration" In Proc. DATE, pp. 423--428, April 2009.

Digital Library

[15]

S. C. Woo, M. Ohara, E. Torrie, J. P. Singh, and A. Gupta. "The SPLASH-2 Programs: Characterization and Methodological Considerations," In Proc. ISCA, pp. 24--36, June 1995.

Digital Library

[16]

P. Schumacher and W. Chung, "FPGA-based MPEG-4 codec," In DSP Magazine, pp. 8--9, 2005.

[17]

R. Dick, Embedded system synthesis benchmarks suites. Available: http://www.ece.northwestern.edu/~dickrp/e3s

[18]

P. Magnusson, M. Christensson, J. Eskilson, D. Forsgren, G. Hallberg, J. Hogberg, F. Larsson, A. Moestedt, and B. Werner. "Simics: A full system simulation platform," In IEEE Computer, vol. 35, pp. 50--58, Feb 2002.

Digital Library

[19]

J. Cong, K. Gururaj, G. Han, A. Kaplan, M. Naik and G. Reinman, "MCSim: An efficient simulation tool for MPSoC designs," In Proc. ICCAD, pp. 364--371, Nov. 2008.

Digital Library

Cited By

Yin JLin ZKayiran OPoremba MAltaf MJerger NLoh G(2018)Modular routing design for chiplet-based systemsProceedings of the 45th Annual International Symposium on Computer Architecture10.1109/ISCA.2018.00066(726-738)Online publication date: 2-Jun-2018
https://dl.acm.org/doi/10.1109/ISCA.2018.00066
Seitanidis INicopoulos CDimitrakopoulos G(2016)Powermax: an automated methodology for generating peak-power traffic in networks-on-chip2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS)10.1109/NOCS.2016.7579318(1-8)Online publication date: Sep-2016
https://doi.org/10.1109/NOCS.2016.7579318
Abdel-Gawad AThottethodi M(2016)Scalable, Global, Optimal-bandwidth, Application-Specific Routing2016 IEEE 24th Annual Symposium on High-Performance Interconnects (HOTI)10.1109/HOTI.2016.016(9-18)Online publication date: Aug-2016
https://doi.org/10.1109/HOTI.2016.016
Show More Cited By

Index Terms

ACES: application-specific cycle elimination and splitting for deadlock-free routing on irregular network-on-chip
1. Hardware
  1. Communication hardware, interfaces and storage
    1. Buses and high-speed links

Recommendations

A joint optimization method for NoC topology generation

The increasing demand on efficient intra-chip communication of multicore systems has driven the interconnection structure to evolve from bus/ring to Network-on-Chip (NoC). NoC design is fundamentally based on network topology generation and ...
Designing application-specific networks on chips with floorplan information
ICCAD '06: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design

With increasing communication demands of processor and memory cores in Systems on Chips (SoCs), scalable Networks on Chips (NoCs) are needed to interconnect the cores. For the use of NoCs to be feasible in today's industrial designs, a custom-tailored, ...
Dynamic Communication Performance of TTN with Uniform and Non-uniform Traffic Patterns Using Virtual Cut-Through Flow Control
ACSAT '14: Proceedings of the 2014 3rd International Conference on Advanced Computer Science Applications and Technologies

Tori connected Torus Network (TTN) is a 2D-torus network of multiple basic modules, where each basic module is a 2D-torus network that are hierarchically interconnected for higher-level networks. The static network performance and dynamic communication ...

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '10: Proceedings of the 47th Design Automation Conference

June 2010

1036 pages

ISBN:9781450300025

DOI:10.1145/1837274

General Chair:
Sachin Sapatnekar
Univ. of Minnesota, Minneapolis, MN

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 13 June 2010

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Funding Sources

Conference

DAC '10

Sponsor:

EDAC
SIGDA

DAC '10: The 47th Annual Design Automation Conference 2010

June 13 - 18, 2010

California, Anaheim

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

20
Total Citations
View Citations
238
Total Downloads

Downloads (Last 12 months)7
Downloads (Last 6 weeks)2

Reflects downloads up to 03 Mar 2025

Other Metrics

View Author Metrics

Citations

Cited By

Yin JLin ZKayiran OPoremba MAltaf MJerger NLoh G(2018)Modular routing design for chiplet-based systemsProceedings of the 45th Annual International Symposium on Computer Architecture10.1109/ISCA.2018.00066(726-738)Online publication date: 2-Jun-2018
https://dl.acm.org/doi/10.1109/ISCA.2018.00066
Seitanidis INicopoulos CDimitrakopoulos G(2016)Powermax: an automated methodology for generating peak-power traffic in networks-on-chip2016 Tenth IEEE/ACM International Symposium on Networks-on-Chip (NOCS)10.1109/NOCS.2016.7579318(1-8)Online publication date: Sep-2016
https://doi.org/10.1109/NOCS.2016.7579318
Abdel-Gawad AThottethodi M(2016)Scalable, Global, Optimal-bandwidth, Application-Specific Routing2016 IEEE 24th Annual Symposium on High-Performance Interconnects (HOTI)10.1109/HOTI.2016.016(9-18)Online publication date: Aug-2016
https://doi.org/10.1109/HOTI.2016.016
Chen YCong JGill MReinman GXiao B(2015)Customizable ComputingSynthesis Lectures on Computer Architecture10.2200/S00650ED1V01Y201505CAC03310:3(1-118)Online publication date: 6-Jul-2015
https://doi.org/10.2200/S00650ED1V01Y201505CAC033
Lee DParikh RBertacco VIvanov AMarculescu DPande PFlich JPattabiraman K(2015)Highly Fault-tolerant NoC Routing with Application-aware Congestion ManagementProceedings of the 9th International Symposium on Networks-on-Chip10.1145/2786572.2786590(1-8)Online publication date: 28-Sep-2015
https://dl.acm.org/doi/10.1145/2786572.2786590
Cano JFlich JRoca ADuato JCoppola MLocatelli R(2014)Efficient Routing in Heterogeneous SoC Designs with Small Implementation OverheadIEEE Transactions on Computers10.1109/TC.2012.29963:3(557-569)Online publication date: 1-Mar-2014
https://dl.acm.org/doi/10.1109/TC.2012.299
Abdel-Gawad AThottethodi MBhatele ADamkroger TDongarra J(2014)RAHTMProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1109/SC.2014.32(325-335)Online publication date: 16-Nov-2014
https://dl.acm.org/doi/10.1109/SC.2014.32
Hu SXu WLin JLin X(2014)Probabilistic odd---evenThe Journal of Supercomputing10.1007/s11227-014-1250-670:1(385-407)Online publication date: 1-Oct-2014
https://dl.acm.org/doi/10.1007/s11227-014-1250-6
Verma RKhan MZinzuwadiya A(2013)Power and Latency Optimized Deadlock-Free Routing Algorithm on Irregular 2D Mesh NoC using LBDReInternational Journal of Embedded and Real-Time Communication Systems10.4018/jertcs.20130401024:2(36-49)Online publication date: 1-Apr-2013
https://dl.acm.org/doi/10.4018/jertcs.2013040102
Xiao CFrank Chang MCong JGill MHuang ZLiu CReinman GWu H(2013)Stream arbitrationACM Transactions on Architecture and Code Optimization10.1145/2400682.24007199:4(1-27)Online publication date: 20-Jan-2013
https://dl.acm.org/doi/10.1145/2400682.2400719
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Figures

Tables

Media

View Table of Conten