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A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms

Published: 13 June 2010 Publication History

Abstract

The key characteristic of next generation embedded applications will be the intensive data transfer and storage and the need for efficient memory management. The embedded system designer community needs optimization methodologies and techniques, which do not change the input-output functionality of the software applications or the design of the underlying hardware platform. In this paper, the key focus is the efficient data access and memory storage of both dynamically and statically allocated data and their assignment on the data memory hierarchy of an MPSoC platform. We propose a design tool framework to efficiently automate the time-consuming optimizations for parallelization and memory mapping of static and dynamic data for MPSoCs.

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  • (2017)A Novel Hardware Accelerator for Embedded Object Detection ApplicationsIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2016.25208885:4(551-562)Online publication date: Oct-2017
  • (2014)AutopaRProceedings of the 2014 43rd International Conference on Parallel Processing Workshops10.1109/ICPPW.2014.32(159-165)Online publication date: 9-Sep-2014
  • (2013)Throughput-memory footprint trade-off in synthesis of streaming software on embedded multiprocessorsACM Transactions on Embedded Computing Systems10.1145/2539036.253904213:3(1-26)Online publication date: 24-Dec-2013
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  1. A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms

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        cover image ACM Conferences
        DAC '10: Proceedings of the 47th Design Automation Conference
        June 2010
        1036 pages
        ISBN:9781450300025
        DOI:10.1145/1837274
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Publication History

        Published: 13 June 2010

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        Author Tags

        1. MPSoC
        2. embedded systems
        3. memory optimization

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        View all
        • (2017)A Novel Hardware Accelerator for Embedded Object Detection ApplicationsIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2016.25208885:4(551-562)Online publication date: Oct-2017
        • (2014)AutopaRProceedings of the 2014 43rd International Conference on Parallel Processing Workshops10.1109/ICPPW.2014.32(159-165)Online publication date: 9-Sep-2014
        • (2013)Throughput-memory footprint trade-off in synthesis of streaming software on embedded multiprocessorsACM Transactions on Embedded Computing Systems10.1145/2539036.253904213:3(1-26)Online publication date: 24-Dec-2013
        • (2012)Improving last level cache locality by integrating loop and data transformationsProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429398(65-72)Online publication date: 5-Nov-2012
        • (2011)Mapping Embedded Applications on MPSoCs: The MNEMEE ApproachVLSI 2010 Annual Symposium10.1007/978-94-007-1488-5_10(165-179)Online publication date: 8-Sep-2011
        • (2010)MNEMEEProceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems10.1145/1878921.1878959(257-258)Online publication date: 24-Oct-2010
        • (2010)Mapping Embedded Applications on MPSoCsProceedings of the 2010 IEEE Annual Symposium on VLSI10.1109/ISVLSI.2010.96(512-517)Online publication date: 5-Jul-2010

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