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Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances

Published: 13 June 2010 Publication History

Abstract

As the variations of shrunk processes increasing at rapid rate, the performances of analog/mixed-signal chips remarkably fluctuate. It is necessary to take the yield as a design objective in design optimization. This paper presents a novel method to generate yield-embedded Pareto-front to simultaneously optimize both the yield and performances. Unlike the traditional approaches which generate the yield-aware Pareto-front to optimize performances for the fixed yield, this work embeds the yield as an objective of the optimization and evolutionarily optimizes both yield and performances by the so-called yield-embedded NSGA. The experiments demonstrate the gradual evolutions and global searching for the better performances and higher yields under PVT variations. The generation accelerated by parallel computations gains 4.8x speedup with 80% efficiency.

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Cited By

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  • (2024)NSGA-II- and Fuzzy-TOPSIS Algorithms-Based Realization of a Low-Power and High-$${g}_{{m}}$$ CDTAInternational Journal of Fuzzy Systems10.1007/s40815-024-01908-8Online publication date: 17-Dec-2024
  • (2019)Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8714784(78-83)Online publication date: Mar-2019
  • (2017)Multi-objective optimization and analysis for the design space exploration of analog circuits and solar cellsEngineering Applications of Artificial Intelligence10.1016/j.engappai.2016.08.01062:C(373-383)Online publication date: 1-Jun-2017
  • Show More Cited By

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  1. Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances

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    cover image ACM Conferences
    DAC '10: Proceedings of the 47th Design Automation Conference
    June 2010
    1036 pages
    ISBN:9781450300025
    DOI:10.1145/1837274
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 13 June 2010

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    Author Tags

    1. Pareto-front
    2. analog/mixed-signal
    3. optimization
    4. yield

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    View all
    • (2024)NSGA-II- and Fuzzy-TOPSIS Algorithms-Based Realization of a Low-Power and High-$${g}_{{m}}$$ CDTAInternational Journal of Fuzzy Systems10.1007/s40815-024-01908-8Online publication date: 17-Dec-2024
    • (2019)Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8714784(78-83)Online publication date: Mar-2019
    • (2017)Multi-objective optimization and analysis for the design space exploration of analog circuits and solar cellsEngineering Applications of Artificial Intelligence10.1016/j.engappai.2016.08.01062:C(373-383)Online publication date: 1-Jun-2017
    • (2015)A multi-objective clonal selection algorithm for analog circuit and solar cell design2015 International Workshop on Artificial Immune Systems (AIS)10.1109/AISW.2015.7469240(1-7)Online publication date: Jul-2015
    • (2011)Design of robust metabolic pathwaysProceedings of the 48th Design Automation Conference10.1145/2024724.2024892(747-752)Online publication date: 5-Jun-2011

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