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Power-efficient variation-aware photonic on-chip network management

Published: 18 August 2010 Publication History

Abstract

Recent advances in nanophotonic technology have made nano- photonic interconnect an attractive on-chip communication solution for emerging many-core systems. However, fabrication- induced process variation and run-time system thermal effects directly affect nanophotonic device operation, and introduce serious challenges, e.g., signal power loss and crosstalk, to the power, performance and reliability of nanophotonic communication.
This article first develops models to characterize nanophotonic process and thermal variation effects. Next, it presents a run-time management solution, an integration of inter-channel hopping, intra-channel wavelength tuning and variation-aware routing. Together, the proposed techniques can optimize the performance and reliability of nanophotonic communication with excellent power efficiency.

References

[1]
ePIXfab. http://www.epixfab.eu/.
[2]
R. G. Beausoleil, P. J. Kuekes, G. S. Snider, S.-Y. Wang, and R. S. Williams. Nanoelectronic and nanophotonic interconnect. Proc. IEEE, 96(2):230--247, Feb. 2008.
[3]
N. L. Binkert, R. G. Dreslinski, L. R. Hsu, K. T. Lim, A. G. Saidi, and S. K. Reinhardt. The M5 simulator: Modeling networked systems. IEEE Micro, 26(4):52--60, 2006.
[4]
D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A framework for architectural-level power analysis and optimizations. In Proc. Int. Symp. Computer Architecture, pages 83--94, June 2000.
[5]
L. Chen, K. Preston, S. Manipatruni, and M. Lipson. Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors. Opt. Express, 17(17):15248--15256, Aug. 2009.
[6]
M. J. Cianchetti, J. C. Kerekes, and D. H. Albonesi. Phastlane: a rapid transit optical routing network. In Proc. Int. Symp. Computer Architecture, pages 441--450, June 2009.
[7]
C. H. Cox. Analog Optical Links: Theory and Practice. Cambridge University Press, 2006.
[8]
M. Garey and D. Johnson. Computers and Intractability: A Guide to the Theory of NP-Completeness. W. H. Freeman, 1979.
[9]
Z. Li, M. Mohamed, H. Zhou, L. Shang, A. Mickelson, M. Vachharajani, D. Filipovic, W. Park, and Y. Sun. Global on-chip coordination at light speed. IEEE Design and Test of Computers, 2010.
[10]
S. Manipatruni, R. K. Dokania, B. Schmidt, N. Sherwood-Droz, C. B. Poitras, A. B. Apsel, and M. Lipson. Wide temperature range operation of micrometer-scale silicon electro-optic modulators. Opt. Lett., 33(19):2185--2187, 2008.
[11]
Y. Pan, P. Kumar, J. Kim, G. Memik, Y. Zhang, and A. Choudhary. Firefly: illuminating future network-on-chip with nanophotonics. In Proc. Int. Symp. Computer Architecture.
[12]
M. A. Popovic. Theory and design of high-index-contrast microphotonic circuits. PhD thesis, Massachusetts Institute of Technology, Cambridge, Massachusetts, USA, 2008.
[13]
A. Prabhu, A. Tsay, Z. Han, and V. Van. Ultracompact SOI microring add-drop filter with wide bandwidth and wide FSR. Photonics Technology Letters, IEEE, 21(10):651--653, May 2009.
[14]
N. Sherwood-Droz, H. Wang, L. Chen, B. G. Lee, A. Biberman, K. Bergman, and M. Lipson. Optical 4x4 hitless slicon router for optical networks-on-chip (noc). Opt. Express, 16(20): 15915--15922, 2008.
[15]
D. Vantrease, R. Schreiber, M. Monchiero, M. McLaren, N. P. Jouppi, M. Fiorentino, A. Davis, N. Binkert, R. G. Beausoleil, and J. H. Ahn. Corona: System implications of emerging nanophotonic technology. In Proc. Int. Symp. Computer Architecture, 2008.
[16]
Q. Xu, B. Schmidt, J. Shakya, and M. Lipson. Cascaded silicon micro-ring modulators for WDM optical interconnection. Optics Express, 14(20):9430--9435, 2006.
[17]
Y. Yang, C. Zhu, Z. P. Gu, L. Shang, and R. P. Dick. Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design. In Proc. Int. Conf. Computer-Aided Design, pages 575--582, Nov. 2006.

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  • (2020)A Survey of Silicon Photonics for Energy-Efficient Manycore ComputingIEEE Design & Test10.1109/MDAT.2020.298262837:4(60-81)Online publication date: Aug-2020
  • (2020)Vulnerability assessment of fault-tolerant optical network-on-chipsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2020.06.016145(140-159)Online publication date: Nov-2020
  • (2019)Hardware-Software Collaborative Thermal Sensing in Optical Network-on-Chip--based Manycore SystemsACM Transactions on Embedded Computing Systems10.1145/336209918:6(1-24)Online publication date: 15-Nov-2019
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    cover image ACM Conferences
    ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
    August 2010
    458 pages
    ISBN:9781450301466
    DOI:10.1145/1840845
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 18 August 2010

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    Author Tags

    1. nanophotonics
    2. networks on chip
    3. optical interconnects

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    View all
    • (2020)A Survey of Silicon Photonics for Energy-Efficient Manycore ComputingIEEE Design & Test10.1109/MDAT.2020.298262837:4(60-81)Online publication date: Aug-2020
    • (2020)Vulnerability assessment of fault-tolerant optical network-on-chipsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2020.06.016145(140-159)Online publication date: Nov-2020
    • (2019)Hardware-Software Collaborative Thermal Sensing in Optical Network-on-Chip--based Manycore SystemsACM Transactions on Embedded Computing Systems10.1145/336209918:6(1-24)Online publication date: 15-Nov-2019
    • (2018)OPERONProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196084(1-6)Online publication date: 24-Jun-2018
    • (2018)LIBRA: Thermal and Process Variation Aware Reliability Management in Photonic Networks-on-ChipIEEE Transactions on Multi-Scale Computing Systems10.1109/TMSCS.2018.28462744:4(758-772)Online publication date: 1-Oct-2018
    • (2018)Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser TuningIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2016.25616236:3(343-356)Online publication date: 1-Jul-2018
    • (2018)A Thermal-Aware Power Allocation Method for Optical Network-on-ChipIEEE Access10.1109/ACCESS.2018.28754046(61176-61183)Online publication date: 2018
    • (2017)Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload AllocationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.260023836:5(801-814)Online publication date: 1-May-2017
    • (2014)Reliability-Aware Design Flow for Silicon Photonics On-Chip InterconnectIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2013.227838322:8(1763-1776)Online publication date: Aug-2014
    • (2013)Process variation in silicon photonic devicesApplied Optics10.1364/AO.52.00763852:31(7638)Online publication date: 31-Oct-2013
    • Show More Cited By

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