Karthick Rajamani
John Carter
ABSTRACT
The processor and cooling subsystems of high-performance servers consume a significant portion of total system power. In this paper, we use the server energy-efficiency benchmark SPECpower_ssj2008 to assess dynamic power management strategies for these sub-systems on an IBM POWER 750 platform.
First, we evaluate the impact of feedback-driven fan control to reduce power while continuously maintaining a suitable thermal environment. Next, we demonstrate the importance of refining traditional utilization-based DVFS algorithms when managing systems with large core and thread counts. We present a new approach and demonstrate its effectiveness with real-world scenarios for dynamic power management.
With reliable runtime power management, we can safely boost (turbo) core frequencies beyond their nominal values to achieve higher throughput. The combined effect of dynamic fan and enhanced processor DVFS control yields an overall improvement of 43% for the energy-efficiency score of the SPECpower_ssj2008 benchmark on our test system.
- S. Eyerman and L. Eeckhout. Per-thread cycle accounting in SMT processors. In The 14th International conference on the Architectural Support for Progrramming Languages and Operating Systems (ASPLOS-XIV), 2009. Google Scholar
Digital Library
- K. Flautner and T. Mudge. Vertigo: Automatic Performance-Setting for Linux. In Proceedings of the Fifth Symposium on Operating Systems Design and Implementation (OSDI), pages 105--116, December 2002. Google ScholarDigital Library
- M. Huang, J. Renau, S. Yoo, and J. Torellas. A framework for dynamic energy-efficiency and temperature management. In Proceedings of 33rd International Symposium on Microarchitecture (Micro-33), December 2000. Google ScholarDigital Library
- Intel Corporation. Addressing power and thermal challenges in the datacenter. Document Number: 302739-001, 2005.Google Scholar
- N. Kappiah, V. W. Freeh, D. K. Lowenthal, and F. Pan. Exploiting slack time in power-aware, high-performance programs. In IEEE/ACM Supercomputing 2005 (SC|05), November 2005.Google Scholar
- H.-Y. McCreary, M. A. Broyles, M. S. Floyd, A. J. Geissler, S. P. Hartman, F. L. Rawson, T. J. Rosedahl, J. C. Rubio, and M. S. Ware. EnergyScale for IBM POWER6 microprocessor-based systems. IBM Journal of Research and Development, 51(6):775--786, November 2007. Google ScholarDigital Library
- C. Patel and P. Ranganathan. Enterprise power and cooling: A chip-to-data center perspective. Tutorial at Hot Chips 19, http://www.hotchips.org/archives/hc19/, 2007.Google Scholar
- T. Pering, T. Burd, and R. Brodersen. Dynamic voltage scaling and the design of a low-power microprocessor system. In Power Driven Microarchitecture Workshop, attached to ISCA98, June 1998.Google Scholar
- K. Rajamani, H. Hanson, M. Ware, J. Carter, and F. Rawson. Slack Detection and Exploitation for Performance-Aware Power Management. Technical Report RC24734, IBM Research, January 2009.Google Scholar
- K. Rajamani, C. Lefurgy, S. Ghiasi, J. Rubio, H. Hanson, and T. Keller. Power management for computer systems and datacenters. International Symposium on Low Power Electronics and Design tutorial, http://www.islped.org/X2008/Rajamani.pdf, 2008. Google ScholarDigital Library
- Standard Performance Evaluation Corporation. http://www.specbench.org.Google Scholar
- N. Tolia, Z. Wange, P. Ranganathan, C. Bash, M. Marwah, and X. Zhu. Unified thermal and power management in server enclosures. In Proceedings of the ASME/Pacific Rim Technical Conference and Exhibition on Packing and Integration of Electronic and Photonic Systems, MEMS and NEMS (InterPACK '09), July 2009.Google ScholarCross Ref
- M. Ware, K. Rajamani, M. Floyd, B. Brock, J. C. Rubio, F. Rawson, and J. B. Carter. Architecting for power management: The IBM POWER7 approach. In The 16th IEEE International Symposium on High-Performance Computer Architecture (HPCA-16), January 2010.Google Scholar
Index Terms
- Power-performance management on an IBM POWER7 server
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