ABSTRACT
Design-time power analysis is one of the most critical tasks conducted by chip architects and circuit designers. While computer-aided power analysis tools can provide power consumption estimates for various circuit blocks, these estimates can substantially deviate from the actual power consumption of working silicon chips. We propose a novel methodology that provides accurate, detailed post-silicon spatial power estimates using the thermal infrared emissions from the backside of silicon die. We theoretically and empirically demonstrate the inherent difficulties in thermal to power inversion. These difficulties arise from measurement errors and from the inherent spatial low-pass filtering associated with heat diffusion. To address these difficulties we propose new techniques from regularization theory to invert temperature to power. Furthermore, we propose new techniques to compute the emissivities and conductances required for any infrared to power inversion method. To verify our results, a programmable circuit of micro heaters is implemented to create any desired power pattern. The thermal emissions of different known injected power patterns are captured using a state-of-the-art infrared camera, and then our characterization techniques are applied to invert the thermal emissions to power. The estimated power patterns are validated against the injected power patterns to demonstrate the accuracy of our methodology.
- G. C. Albright and J. McDonald. Microthermal Imaging in the Infrared. Electronics Cooling, January 1997.Google Scholar
- M. Bertero and P. Boccacci. Introduction to Inverse Problems in Imaging. Institute of Physics Publishing, 1998.Google ScholarCross Ref
- D. Brooks, V. Tiwari, and M. Martonosi. Wattch: A Framework for Architectural-Level Power Analysis and Optimizations. In International Symposium on Computer Architecture, pages 83--94, 2000. Google ScholarDigital Library
- K. Etessam-Yazdani, M. Asheghi, and H. Hamann. Investigation of the Impact of Power Granularity on Chip Thermal Modeling Using White Noise Analysis. IEEE Trans on Components and Packaging Technologies, 31(1):211--215, 2008.Google ScholarCross Ref
- H. Hamann, A. Weger, J. Lacey, Z. Hu,and P. Bose. Hotspot-Limited Microprocessors: Direct Temperature and Power Distribution Measurements. IEEE Journal of Solid-State Circuits, 42(1):56--65, 2007.Google ScholarCross Ref
- W. Huan, M. R. Stan, K. Sankaranarayanan, R. J. Ribando, and K. Skadron. Many-Core Design from a Thermal Perspective. In Design Automation Conference, pages 746--749, 2008. Google ScholarDigital Library
- C. Isci, G. Contreras, and M. Martonosi. Live, RuntimePhase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management. In International Symposium on Microarchitecture, pages 359--370, 2006. Google ScholarDigital Library
- S. Lin, G. Chrysler, R. Mahajan, V. De, and K. Banerjee. A Self-Consistent Substrate Thermal Profile Estimation Technique for Nanoscale ICs -- Part I: Electrothermal Couplings and Full-Chip Package Thermal Model. IEEE Transactions on Electron Devices, 54(12):3342--3350, 2007.Google ScholarCross Ref
- F. J. Mesa-Martinez, M. Brown, J. Nayfach-Battilana, and J. Renau. Measuring Performance, Power, and Temperature from Real Processors. In International Symposium on Computer Architecture, pages 1--10, 2007.Google ScholarDigital Library
- M. Pedram and S. Nazarin. Thermal Modeling, Analysis, and Management in VLSI circuits: Principles and Methods. Proceedings of the IEEE, 94(8):1487--1501, 2006.Google ScholarCross Ref
- M. Powell, A. Biswas, J. Emer, and S. Mukherjee. CAMP: A Technique to Estimate per-Structure Power at Run-Time Using a Few Simple Parameters. International Symposium on High Performance Computer Architecture, pages 289--300, 2009.Google ScholarCross Ref
- J. Renau. Personal Communication.Google Scholar
- A. Rogalski and K.Chrzanowski. Infrared Devices and Techniques. Opto-Electronics Review, 10(2):111--136, 2002.Google Scholar
- A. Srivastava, R. Bai, D. Blaauw, and D. Sylvester. Modeling and Analysis of Leakage Power Considering Within-Die Process Variations. In International Symposium on Low Power Electronics and Design, pages 64--67, 2002. Google ScholarDigital Library
- C. R.Vogel. Computational Methods for Inverse Problems. Society for Industrial and Applied Math, 2002. Google ScholarDigital Library
Index Terms
- Post-silicon power characterization using thermal infrared emissions
Recommendations
Improved post-silicon power modeling using AC lock-in techniques
DAC '11: Proceedings of the 48th Design Automation ConferenceThe objective of power modeling is to estimate the power consumption of integrated circuits under different workloads and variabilities. Post-silicon power modeling is an essential step for design validation and for building trustable pre-silicon power ...
A power modeling and characterization method for the CMOS standard cell library
ICCAD '96: Proceedings of the 1996 IEEE/ACM international conference on Computer-aided designIn this paper, we propose power consumption models for complex gates and transmission gates, which are extended from the model of basic gates proposed in [1]. We also describe an accurate power characterization method for CMOS standard cell libraries ...
System Level Power Characterization of Multi-core Computers with Dynamic Frequency Scaling Support
CLUSTERW '12: Proceedings of the 2012 IEEE International Conference on Cluster Computing WorkshopsMulti-core architecture has become prominent in modern processors including personal computers, large scale server systems and embedded systems. While multi core processors provide higher computing performance, they have higher power density and also ...
Comments