Nam Ho
ABSTRACT
To deploy a memory protection mechanism, it requires CPU support hardware components like Memory Management Unit (MMU) or Memory Protection Unit (MPU). However, in embedded system, most of microcontrollers lack to be equipped these features because they cause the system incurred hardware cost and performance penalty. In this paper, a method to detect memory corruption at run-time without incurring hardware cost is proposed. Embedded system processor does not require having MMU or MPU. Off-chip detection based on FPGA by hooking on memory bus to monitor memory access for multitasking Realtime Operating System (RTOS) application is explored. Our solution, called MemMON, by combining hardware/software can detect memory access error such as task's stack overflow, task's reading/writing to code/data segments of the other tasks or memory access violation to OS kernel efficiently. In experimental evaluation, a comparison of realtime schedulability is carried out for both using and not using MemMON. Using our MemMON causes realtime schedulability of the system dropped-off about 3 times.
- Abraham Silberschatz & Peter Baer Calvin, chap. 9 "Virtual Memory", chap. 19 "Protection", Operating System Conceptss, Addison. Wesley Publishers, 5th Edition, page 289--335, page 597--621.Google Scholar
- Andrew N. Sloss, Dominic Symes, Chris Wright, chap. 13 "Memory Protection Units", chap. 14 "Memory Management Units", ARM System Developer's Guide Designing and Optimizing System Software, Morgan Kaufmann Publishers, 2004, page 461--488, page 491--546.Google Scholar
- Yamada, S.; Nakamoto, Y.; Azumi, T.; Oyama, H.; Takada, H., July 2008, Generic Memory Protection Mechanism for Embedded System and Its Application to Embedded Component Systems, In Processing of IEEE 8th International Conference on Computer and Information Technology Workshops, pp. 557--562. Google ScholarDigital Library
- Eric J. Koldinger, Jeffrey S. Chase, Susan J. Eggers, 1992, Architecture Support for Single Address Space Operating Systems, In Proceedings of the fifth international conference on Architectural support for programming languages and operating systems, Boston Massachusetts, US, pp. 175--186. Google ScholarDigital Library
- Emmett Witchel, Josh Cates, and Krste Asanovic, 2002, Mondrian memory protection, In Proceedings of the 10th annual conference on Architectural Support for Programming Languages and Operating Systems, San Jose California, pp. 304--316. Google ScholarDigital Library
- Adam Wiggins, SimonWinwood, Harvey Tuch, and Gernot Heiser, 2003, Legba: Fast Hardware Support for FineGrained Protection, In Processings of the 8th Asia-Pacific, Computer Systems Architecture Conference, Aizu-Wakamatsu Japan, pp. 320--336.Google ScholarCross Ref
- T. Shinagawa, K. Kono, T. Masuda, 2000, Fine-grained Protection Domain based on Segmentation Mechanism, Japan Society for Software Science and Technology, http://spa.jssst.or.jp/2000/proceedings/shinagawa.pdf.Google Scholar
- Shoji Suzuki, Kang G. Shin, 1997, On memory protection in real-time OS for small embedded systems, In Proceedings of Fourth International Workshop on Real-Time Computing Systems and Applications, (RTCSA'97), Taipei Taiwan, pp. 51--58. Google ScholarDigital Library
- Frank W. Miller, 2002, Simple Memory Protection for Embedded Operating System Kernels, In Proceedings of the FREENIX Track: 2002 USENIX Annual Technical Conference, Berkeley CA USA, pp. 299--308. Google ScholarDigital Library
- Seshua, U. Bussa, N. Vermeulen, B, 2007, A Run-Time Memory Protection Methodology, In Proceedings of the 2007 conference on Asia South Pacific Design Automation, Yokohama Japan, pp. 498--503. Google ScholarDigital Library
- Kumar, R. Singhania, A. Castner, A. Kohler, E. Srivastava, M., 2007, A System For Coarse Grained Memory Protection In Tiny Embedded Processors, Proceedings of the 44th annual conference on Design Automation, San Diego California, pp. 218--223. Google ScholarDigital Library
- Arora, D. Raghunathan, A. Ravi, S. Jha, N. K., 2006, Architectural Support for Safe Software Execution on Embedded Processors, In Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, Seoul Korea, pp. 106--111. Google ScholarDigital Library
- George C. Necula, Scott Mcpeak, Westley Weimer, 2005, ACM Transactions on Programming Languages and Systems (TOPLAS), CCured: type-safe retrofitting of legacy software, Vol. 27, Issue 3, pp. 477--526. Google ScholarDigital Library
- Reed Hastings and Bob Joyce, 1992, Purify: fast detection of memory leaks and access errors, In Proceedings of the Winter Usenix Conference, pp. 125--136.Google Scholar
- Matthew Simpson, Bhuvan Middha, Rajeev Barua, 2005, Segment Protection for Embedded Systems Using Runtime Checks, In Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems, San Francisco California USA, pp. 66--77. Google ScholarDigital Library
- Robert Wahbe, Steven Lucco, Thomas E. Anderson, Susan L. Graham, 1994, Efficient Software-Based Fault Isolation, In Proceedings of the 14th ACM Symposium on Operating Systems Principles, Asheville North Carolina United States, pp. 203--216. Google ScholarDigital Library
- Jean J. Labrosse, MicroC OS II: The Real Time Kernel, Newnes Publishers, 2nd Edition. Google ScholarDigital Library
- Altera®, DE2 Development and Education Board, http://www.altera.com/education/univ/materials/boards/unv-de2-board.html.Google Scholar
- http://www.phytec.com/products/sbc/ARM-XScale/phyCORE-ARM7-LPC2294.htmlGoogle Scholar
- D. Stewart, Measuring Execution Time and Real-Time Performance, Proceedings of the Embedded Systems Conference (ESC), 2001.Google Scholar
- Lehoczky, J.; Sha, L.; Ding, Y., The Rate Monotonic Scheduling Algorithm: Exact Characterization and Average Case Behavior, IEEE Real-Time Systems Symposium 1989, Santa Monica, CA, pp. 166--17Google Scholar
Index Terms
- MemMON: run-time off-chip detection for memory access violation in embedded systems
Recommendations
Write-aware memory management for hybrid SLC-MLC PCM memory systems
In recent years, phase-change memory (PCM) has generated a great deal of interest because of its byte addressability and non-volatility properties. It is regarded as a good alternative storage medium that can reduce the performance gap between the main ...
RTOS-centric hardware/software cosimulator for embedded system design
CODES+ISSS '04: Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesisThis paper presents an RTOS-centric hardware/software cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is that it has a complete simulation model of an RTOS which is widely used in ...
RTOS-Centric Hardware/Software Cosimulator for Embedded System Design
CODES+ISSS '04: Proceedings of the international conference on Hardware/Software Codesign and System Synthesis: 2004This paper presents an RTOS-centric hardware/software cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is that it has a complete simulation model of an RTOS which is widely used in ...
Comments