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Power, performance and security optimized hardware design for H.264

Published: 21 April 2010 Publication History

Abstract

Designing a hardware H.264 codec that meets the competing needs of the trusted battlefield communications is extremely challenging as it requires the evaluation of many potential architectural options to select an optimal solution. We discuss a solution to design a parameterized reconfigurable fabric that allows the architecture to be adjusted to meet the power, performance and security requirements.

Supplementary Material

Supplemental material. (a62-gomathisankaran_slides.pdf)

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      cover image ACM Other conferences
      CSIIRW '10: Proceedings of the Sixth Annual Workshop on Cyber Security and Information Intelligence Research
      April 2010
      257 pages
      ISBN:9781450300179
      DOI:10.1145/1852666
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 21 April 2010

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