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Evaluation of a hardware transactional memory model in an NoC-based embedded MPSoC

Published: 06 September 2010 Publication History

Abstract

Transactional memories have emerged in the last years as a new solution for synchronization on shared memory multiprocessors helping to exploit the parallelism of applications while overcoming limitations of the lock mechanism. This paper presents the performance and energy evaluation of a hardware transactional memory (HTM) solution in an NoC-based MPSoC environment, comparing it to a traditional shared memory model that uses locks to provide consistency. Experiments show that transactional memory is a promising alternative to locks for future NoC-based embedded systems, resulting in performance gains up to 30% and energy savings up to 32%, depending on the application and on the architecture configuration.

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  • (2024)Optimized Multi-Processor System-on-Chip (MPSoC) Design for Low-Resource JPEG Encoding2024 6th International Conference on Advancements in Computing (ICAC)10.1109/ICAC64487.2024.10851123(115-120)Online publication date: 12-Dec-2024
  • (2018)Hardware Transactional Memory Exploration in Coherence-Free Many-Core ArchitecturesInternational Journal of Parallel Programming10.1007/s10766-018-0569-746:6(1304-1328)Online publication date: 1-Dec-2018
  • (2015)A Predictable Transactional Memory Architecture with Selective Conflict Resolution for Mixed-Criticality Support in MPSoCsProceedings of the 2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing (EUC)10.1109/EUC.2015.11(158-162)Online publication date: 21-Oct-2015
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    cover image ACM Conferences
    SBCCI '10: Proceedings of the 23rd symposium on Integrated circuits and system design
    September 2010
    228 pages
    ISBN:9781450301527
    DOI:10.1145/1854153
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 06 September 2010

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    Author Tags

    1. NoC
    2. embedded systems
    3. hardware
    4. transactional memory

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    • (2024)Optimized Multi-Processor System-on-Chip (MPSoC) Design for Low-Resource JPEG Encoding2024 6th International Conference on Advancements in Computing (ICAC)10.1109/ICAC64487.2024.10851123(115-120)Online publication date: 12-Dec-2024
    • (2018)Hardware Transactional Memory Exploration in Coherence-Free Many-Core ArchitecturesInternational Journal of Parallel Programming10.1007/s10766-018-0569-746:6(1304-1328)Online publication date: 1-Dec-2018
    • (2015)A Predictable Transactional Memory Architecture with Selective Conflict Resolution for Mixed-Criticality Support in MPSoCsProceedings of the 2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing (EUC)10.1109/EUC.2015.11(158-162)Online publication date: 21-Oct-2015
    • (2014)Speculative synchronization for coherence-free embedded NUMA architectures2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)10.1109/SAMOS.2014.6893200(99-106)Online publication date: Jul-2014
    • (2013)Transparent and energy-efficient speculation on NUMA architectures for embedded MPSoCsProceedings of the First International Workshop on Many-core Embedded Systems10.1145/2489068.2489078(58-61)Online publication date: 24-Jun-2013
    • (2011)SoC-TMProceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis10.1145/2039370.2039380(39-48)Online publication date: 9-Oct-2011
    • (2011)Improving the efficiency of a hardware transactional memory on an NoC-based MPSoC2011 Design, Automation & Test in Europe10.1109/DATE.2011.5763305(1-4)Online publication date: Mar-2011

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