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Power aware SID-based simulator for embedded multicore DSP subsystems

Published: 24 October 2010 Publication History

Abstract

The embedded multicore DSP systems are playing increasingly important role for consumer electronic design. Such systems try to optimize the objective for both performance and power with mobile devices. Embedded application developers will then devise designs to optimize embedded applications for not only performance but also power. However, currently there are no power metrics support for popular application design platforms such as QEMU and SID, where application developers develop their applications. This hinders application developers to help tune optimizations for power. In this paper, we propose a power aware simulation framework on embedded multicore DSP subsystems for SID framework. To the best of our knowledge, this is the first work to attempt to build a power aware simulator based on SID simulation framework. The power estimation flow includes two phases, IP level power modeling and system level power profiling. In the IP level power modeling, PowerMixerIP is employed to build up the power model for PAC DSP and major IPs. In the system level power profiling, we provide a power profiling hierarchy that meets the demand of embedded software developers. The granularity of power profiling can be configured to the whole simulation stage or any specific time slot in the simulation such as a dedicated function loop. In our experiments, DSP programs with SIMD intrinsics for DSPStone benchmark are examined with our proposed power aware simulator. In addition, a face detection application is deployed as a running example on multi-core DSP systems to show how our power simulator can be used to help collaborate with developers in the optimization process to illustrate views of power dissipations of applications

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Cited By

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  • (2019)Rapid Hybrid Simulation Methods for Exploring the Design Space of Signal Processors with Dynamic and Scalable Timing ModelsJournal of Signal Processing Systems10.1007/s11265-017-1285-z91:3-4(247-259)Online publication date: 1-Mar-2019
  • (2015)Compilers for Low Power with Design Patterns on Embedded Multicore SystemsJournal of Signal Processing Systems10.1007/s11265-014-0917-980:3(277-293)Online publication date: 1-Sep-2015
  • (2013)Compilers for Low Power with Design Patterns on Embedded Multicore SystemsProceedings of the 2013 42nd International Conference on Parallel Processing10.1109/ICPP.2013.125(1052-1060)Online publication date: 1-Oct-2013
  • Show More Cited By

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cover image ACM Conferences
CODES/ISSS '10: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
October 2010
348 pages
ISBN:9781605589053
DOI:10.1145/1878961
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 24 October 2010

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Author Tags

  1. dsp
  2. embedded processor
  3. multicore simulation
  4. power

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  • Research-article

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ESWeek '10
ESWeek '10: Sixth Embedded Systems Week
October 24 - 29, 2010
Arizona, Scottsdale, USA

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Cited By

View all
  • (2019)Rapid Hybrid Simulation Methods for Exploring the Design Space of Signal Processors with Dynamic and Scalable Timing ModelsJournal of Signal Processing Systems10.1007/s11265-017-1285-z91:3-4(247-259)Online publication date: 1-Mar-2019
  • (2015)Compilers for Low Power with Design Patterns on Embedded Multicore SystemsJournal of Signal Processing Systems10.1007/s11265-014-0917-980:3(277-293)Online publication date: 1-Sep-2015
  • (2013)Compilers for Low Power with Design Patterns on Embedded Multicore SystemsProceedings of the 2013 42nd International Conference on Parallel Processing10.1109/ICPP.2013.125(1052-1060)Online publication date: 1-Oct-2013
  • (2011)Support of software framework for embedded multi-core systems with Android environments2011 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia10.1109/ESTIMedia.2011.6088522(2-8)Online publication date: Oct-2011

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