Cited By
View all- Khan ARashid M(2016)Generation of SystemVerilog Observers from SysML and MARTE/CCSL2016 IEEE 19th International Symposium on Real-Time Distributed Computing (ISORC)10.1109/ISORC.2016.18(61-68)Online publication date: May-2016
- Khan AMallet FRashid M(2016)Combining SysML and Marte/CCSL to Model Complex Electronic Systems2016 International Conference on Information Systems Engineering (ICISE)10.1109/ICISE.2016.13(12-17)Online publication date: Apr-2016