Abstract
This article is devoted to describing an implementation of Chen's algorithm on FPGA. This algorithm allows the computation of minimum distance of cyclic codes. As an application, we determine the minimum distance of quadratic residue codes of length 223.
- C. Chen. Computer results on the minimum distance of some binary cyclic codes. IEEE Trans. Inf. Theory, IT-16:359--360, 1970.Google ScholarDigital Library
- J. Leon. A probabilistic algorithm for computing minimum weights of large error-correcting codes. IEEE Trans. Inf. Theory, IT-34(5):1354--1359, 1988.Google ScholarDigital Library
- F. MacWilliams and N. Sloane. The Theory of Error-Correcting Codes. North-Holland, 1978.Google Scholar
Index Terms
- A FPGA implementation of Chen's algorithm
Recommendations
An analysis of Chen's construction of minimum-distance five codes
In 1991, C.L. Chen used the inverted construction Y1 on binary linear codes of minimum Hamming distance five to construct a new [47, 36, 5] code. We examine this construction in depth and show that no such codes are obtained unless the fields GF(8) or ...
On Chen and Chen's new tree inclusion algorithm
Very recently, Chen and Chen [Y. Chen, Y. Chen, A new tree inclusion algorithm, Information Processing Letters 98 (2006) 253-262] gave a new algorithm for the tree inclusion problem, which requires O(|T|xmin{depth(P),|leaves(P)|}) time and no extra ...
SoC based floating point implementation of differential evolution algorithm using FPGA
This paper presents floating point design and implementation of System on Chip (SoC) based Differential Evolution (DE) algorithm using Xilinx Virtex-5 Field Programmable Gate Array (FPGA). The hardware implementation is carried out to enhance the ...
Comments