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A platform for high level synthesis of memory-intensive image processing algorithms

Published: 27 February 2011 Publication History

Abstract

For high-end industrial image processing applications with real-time requirements, FPGAs are often used as custom accelerators. High level synthesis tools, such as CatapultC, provide a compelling means of speeding up the algorithmic hardware design. However, increasing image resolutions make it ever more difficult to obtain sufficient throughput from external SDRAM frame buffers while providing simple, low-latency memory resources for the data path. To address these issues, this paper proposes a platform-based design with a custom memory system of buffers, caches and an optimized commercial memory controller that improves available SDRAM bandwidth by up to 4x. This greatly facilitates the high level synthesis flow, which is demonstrated by implementing two memory-intensive algorithms using 47.0 Gbit/s and 5.7 Gbit/s of on-chip and off-chip memory bandwidth respectively.

References

[1]
R. Beun, K. Irek, and M. Ditzel. C++ based design flow for reconfigurable image processing systems. In Field Programmable Logic and Applications. FPL, 2007.
[2]
A. do Carmo Lucas and R. Ernst. An image processor for digital film. In Application-Specific Systems, Architecture Processors. ASAP, 2005.
[3]
K. Gribbon, C. Johnston, and D. Bailey. A real-time fpga implementation of a barrel distortion correction algorithm with bilinear interpolation. In Image and Vision Computing New Zealand, 2003.
[4]
S. Heithecker, A. do Carmo Lucas, and R. Ernst. A high-end real-time digital film processing reconfigurable platform. EURASIP J. Embedded Syst., 2007(1), 2007.
[5]
Z. Larabi, Y. Mathieu, and S. Mancini. Efficient data access management for fpga-based image processing socs. In Rapid System Prototyping. RSP, 2009.
[6]
MentorGraphics Inc. CatapultC Synthesis User's and Reference Manual, 2009a update2 edition, 2010.
[7]
S. Rixner, W. Dally, U. Kapasi, P. Mattson, and J. Owens. Memory access scheduling. In Computer Architecture. ISCA, 2000.
[8]
M. Weinhardt and W. Luk. Memory access optimisation for reconfigurable systems. In Computers and Digital Techniques, IEE Proceedings, volume 148, pages 105--112, 2001.
[9]
Xilinx Inc. Memory Interface Solutions User Guide UG086, 3.0 edition, 2009.
[10]
Xilinx Inc. Multi-Port Memory Controller DS643, 6.01a edition, 2010.
[11]
P. Yiannacouras and J. Rose. A parameterized automatic cache generator for fpgas. In Field-Programmable Technology. FPT, 2003.

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cover image ACM Conferences
FPGA '11: Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
February 2011
300 pages
ISBN:9781450305549
DOI:10.1145/1950413
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 27 February 2011

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Author Tags

  1. fpga
  2. high level synthesis
  3. image processing
  4. sdram

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