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Performance estimation framework for automated exploration of CPU-accelerator architectures

Published: 27 February 2011 Publication History

Abstract

In this paper we present a fast and fully automated approach for studying the design space when interfacing reconfigurable accelerators with a CPU. Our challenge is, that a reasonable evaluation of architecture parameters requires a hardware/software partitioning that makes best use of each given architecture configuration. Therefore we developed a framework based on the LLVM infrastructure that performs this partitioning with high-level estimation of the runtime on the target architecture utilizing profiling information and code analysis. By making use of program characteristics also during the partitioning process, we improve previous results for various benchmarks and especially for growing interface latencies between CPU and accelerator.

References

[1]
K. Compton and S. Hauck. Reconfigurable computing: A survey of systems and software. ACM Computing Surveys, 34(2):171--210, June 2002.
[2]
M. R. Guthaus, J. S. Ringenberg, D. Ernst, T. M. Austin, T. Mudge, and R. B. Brown. Mibench: A free, commercially representative embedded benchmark suite. In WWC '01: Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop, pages 3--14, Washington, DC, USA, 2001. IEEE Computer Society.
[3]
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke. Performance estimation for the exploration of CPU-accelerator architectures. In O. Hammami and S. Larrabee, editors, Proc. Workshop on Architectural Research Prototyping (WARP), June 2010.
[4]
C. Lattner and V. Adve. LLVM: A compilation framework for lifelong program analysis & transformation. In Proc. Int. Symp. on Code Generation and Optimization (CGO), pages 75--86. IEEE Computer Society, Mar 2004.
[5]
S. A. Spacey, W. Luk, P. H. J. Kelly, and D. Kuhn. Rapid design space visualization through hardware/software partitioning. In Proc. Southern Programmable Logic Conference (SPL), pages 159--164. IEEE, Apr. 2009.

Cited By

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  • (2013)On-The-Fly Computing: A novel paradigm for individualized IT services16th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2013)10.1109/ISORC.2013.6913232(1-10)Online publication date: Jun-2013
  • (2012)Turning control flow graphs into function calls: Code generation for heterogeneous architectures2012 International Conference on High Performance Computing & Simulation (HPCS)10.1109/HPCSim.2012.6266973(559-565)Online publication date: Jul-2012

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  1. Performance estimation framework for automated exploration of CPU-accelerator architectures

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      cover image ACM Conferences
      FPGA '11: Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
      February 2011
      300 pages
      ISBN:9781450305549
      DOI:10.1145/1950413
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 27 February 2011

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      Author Tags

      1. design space exploration
      2. hardware/software partitioning
      3. llvm
      4. performance estimation

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      • (2013)On-The-Fly Computing: A novel paradigm for individualized IT services16th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2013)10.1109/ISORC.2013.6913232(1-10)Online publication date: Jun-2013
      • (2012)Turning control flow graphs into function calls: Code generation for heterogeneous architectures2012 International Conference on High Performance Computing & Simulation (HPCS)10.1109/HPCSim.2012.6266973(559-565)Online publication date: Jul-2012

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