Steve Richfield
ABSTRACT
The "Itanium Effect" is a subtle organizational phenomenon leading to the wide adoption of a few widely applicable technologies, and the abandonment of many powerful but more narrowly applicable technologies. This results in potential technological revolutions simply dying on the vine due to a general lack of knowledge about potential enabling technologies. The main elements of the Itanium Effect are:
1. Technology loops, where a limited set of methods results in recreating products from the past, often without correcting their architectural errors
2. Compartmentalized conferences, e.g. FPGA, that work to inhibit designs that merge disciplines
3. Little PhD student participation, that chokes off the supply of fresh ideas
4. Procedural exclusion of futurist and top-down discussions, so that the entire industry proceeds without futurist goals
5. Keeping problems secret, so that no one else can help
The Itanium Effect has become the leading barrier to advancement of high performance computing. We now appear to be on the verge of a computational singularity, where a hundredfold performance gain is available from architectural changes alone, due to the elimination of various sorts of choke points. Unfortunately, there is presently a high threshold to overcome, as there are several enabling technologies that must be simultaneously developed. This can't come from CPU, GPU, or FPGA manufacturers acting alone. These areas must be merged, and somewhat obscure enabling technologies added to glue it all together. The prospective glue technologies examined in this paper include:
1. Logarithmic arithmetic
2. Medium-grained and multi-grained FPGAs
3. Coherent memory mapping
4. Variable data chaining
5. Fast aggregation across ALUs
6. Blurring the SIMD/MIMD distinction using small local program memories
7. A simple horizontal microcoding interface for applications
8. Failsoft configuration on power-up
9. Failsoft partial reconfiguration during execution
10. Physically symmetrical pinout to facilitate the use of defective components.
11. An architecture-independent universal compiler to compile a new APL-level language
- Strenski, D., Sundararajan, P., Wittig, R. 2010. The Expanding Floating-Point Performance Gap Between FPGAs and Microprocessors. HPC wire. November 22. http://www.hpcwire.com/features/The-Expanding-Floating-Point-Performance-Gap-Between-FPGAs-and-Microprocessors-109982029.html?viewAll=yGoogle Scholar
- http://www.computerhistory.org/collections/ibmstretch Computer History Museum's collection of IBM Project STRETCH materials.Google Scholar
- http://www.world-academy-of-science.org/ WORLDCOMP web siteGoogle Scholar
- http://www.fundinguniverse.com/company-histories/TANDEM-COMPUTERS-INC-Company-History.htmlGoogle Scholar
- http://en.wikipedia.org/wiki/Floating_Point_SystemsGoogle Scholar
- DeHon, Andre. 1996. Reconfigurable Architectures for General-Purpose Computing. A.I. Technical Report No. 1586. http://www.seas.upenn.edu/~andre/pdf/aitr1586.pdf Google ScholarDigital Library
- Pickett, L. 1993. U.S. Patent 5,184,317. A discussion of advanced logarithmic arithmetic methods.Google Scholar
- Richfield, S. 1987, A Logarithmic Vector Processor for Neural Net Applications. Proceedings of the IEEE First Annual International Conference on Neural Networks. IEEE Catalog #87TH0191-7.Google Scholar
- Buchholz, Werner. 1962. Planning a computer system: Project Stretch. McGraw-Hill, Inc. Hightstown, NJ, USA. ISBN:B0000CLCYO Google ScholarDigital Library
- Ashenhurt, R. L., Metropolis, N. 1959. Unnormalized Floating Point Arithmetic. Journal of the ACM (JACM) Volume 6, Issue 3. Pp 415--428. ISSN:0004-5411 Google ScholarDigital Library
Index Terms
- Dealing with the "itanium effect" (abstract only)
Recommendations
Intel® Itanium® floating-point architecture
WCAE '03: Proceedings of the 2003 workshop on Computer architecture education: Held in conjunction with the 30th International Symposium on Computer ArchitectureThe Intel® Itanium® architecture is increasingly becoming one of the major processor architectures present in the market today. Launched in 2001, the Intel Itanium processor was followed in 2002 by the Itanium 2 processor, with increased integer and ...
Customizing VLIW processors from dynamically profiled execution traces
The design philosophy of VLIW processors is to maximize instruction level parallelism (ILP) starting from compiler and machine code level to all the way down to memory and computational blocks. For this purpose, VLIW tailoring has been an important ...
A high performance 32-bit ALU for programmable logic
FPGA '04: Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arraysThe Arithmetic-Logic-Unit (ALU) is at the heart of a modern microprocessor, and its size and speed are often significant contributors to the overall processor's cost and performance. This paper presents the design of the ALU used in Altera's NIOS 2.0 ...
Comments