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Rover: routing on via-configurable fabrics for standard-cell-like structured ASICs

Published: 02 May 2011 Publication History

Abstract

In this paper we present a router called Rover for structured ASICs with via-configurable routing fabrics. We present a statistical approach to estimating available routing resource of a predefined routing fabric. We also introduce a concept called pseudo Steiner point to enable higher routing flexibility. We integrate Rover into an industrial design flow. Rover can successfully route a design with 280 thousand two-terminal nets in slightly more than an hour. Compared to a commercial yet non-structured ASIC router without a predefined routing fabric, Rover on average incurs a 47% (5%) increase in total wire length (when not counting overhang wire length). It incurs a 32% increase in the longest path delay, which is considerably smaller than a 47% increase in total wire length.

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Cited By

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  • (2015)A router for via configurable structured ASIC with standard cells and relocatable IPsSixteenth International Symposium on Quality Electronic Design10.1109/ISQED.2015.7085397(51-56)Online publication date: Mar-2015
  • (2013)Relocatable and resizable SRAM synthesis for via configurable structured ASICInternational Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2013.6523657(494-501)Online publication date: Mar-2013
  • (2012)Design and analysis of via-configurable routing fabrics for structured ASICsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2493070(1479-1482)Online publication date: 12-Mar-2012
  • Show More Cited By

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cover image ACM Conferences
GLSVLSI '11: Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
May 2011
496 pages
ISBN:9781450306676
DOI:10.1145/1973009
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 02 May 2011

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Author Tags

  1. router
  2. structured asic
  3. via-configurable
  4. vlsi

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GLSVLSI '11: Great Lakes Symposium on VLSI 2011
May 2 - 4, 2011
Lausanne, Switzerland

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

View all
  • (2015)A router for via configurable structured ASIC with standard cells and relocatable IPsSixteenth International Symposium on Quality Electronic Design10.1109/ISQED.2015.7085397(51-56)Online publication date: Mar-2015
  • (2013)Relocatable and resizable SRAM synthesis for via configurable structured ASICInternational Symposium on Quality Electronic Design (ISQED)10.1109/ISQED.2013.6523657(494-501)Online publication date: Mar-2013
  • (2012)Design and analysis of via-configurable routing fabrics for structured ASICsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2492708.2493070(1479-1482)Online publication date: 12-Mar-2012
  • (2012)Design and analysis of via-configurable routing fabrics for structured ASICs2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.1109/DATE.2012.6176707(1479-1482)Online publication date: Mar-2012

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