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A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation

Published: 05 June 2011 Publication History

Abstract

Ideally, multi-core instruction-set simulation should run in parallel to improve simulation performance. However, the conventional low-parallelism centralized scheduler greatly constrains simulation performance. To resolve this issue, we propose a high-parallelism distributed scheduling mechanism. The experimental results show that our proposed approach accelerates simulation by 6 to 20 times, depending on the number of cores.

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  • (2023)S2MSim: Cycle-Accurate and High-Performance Simulator Based on Multi-Threading for Space Multi-Core ProcessorInternational Journal of Aeronautical and Space Sciences10.1007/s42405-023-00627-y24:5(1465-1478)Online publication date: 8-Jun-2023
  • (2017)SunwayMR: A distributed parallel computing framework with convenient data-intensive applications programmingFuture Generation Computer Systems10.1016/j.future.2017.01.01871(43-56)Online publication date: Jun-2017
  • (2015)Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set SimulationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.243495434:11(1822-1835)Online publication date: Nov-2015
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    cover image ACM Conferences
    DAC '11: Proceedings of the 48th Design Automation Conference
    June 2011
    1055 pages
    ISBN:9781450306362
    DOI:10.1145/2024724
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 05 June 2011

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    Author Tags

    1. instruction-set simulator
    2. multi-core simulation
    3. parallel simulation
    4. timing synchronization

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    View all
    • (2023)S2MSim: Cycle-Accurate and High-Performance Simulator Based on Multi-Threading for Space Multi-Core ProcessorInternational Journal of Aeronautical and Space Sciences10.1007/s42405-023-00627-y24:5(1465-1478)Online publication date: 8-Jun-2023
    • (2017)SunwayMR: A distributed parallel computing framework with convenient data-intensive applications programmingFuture Generation Computer Systems10.1016/j.future.2017.01.01871(43-56)Online publication date: Jun-2017
    • (2015)Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set SimulationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.243495434:11(1822-1835)Online publication date: Nov-2015
    • (2013)A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulationsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485446(643-648)Online publication date: 18-Mar-2013
    • (2013)An Efficient Parallel Mechanism for Highly-Debuggable Multicore SimulatorRevised Selected Papers of the 10th International Symposium on Advanced Parallel Processing Technologies - Volume 829910.1007/978-3-642-45293-2_18(241-253)Online publication date: 27-Aug-2013

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