skip to main content
column

Surviving the end of frequency scaling with reconfigurable dataflow computing

Published: 19 December 2011 Publication History

Abstract

Over the past decade x86 processors have come to dominate the world's largest supercomputers. However in the future conventional multicore processors are unlikely to be able to deliver the necessary performance per $ and per W to achieve exascale performance. Heterogeneous computing is emerging as a powerful alternative to conventional multi-core to help address these challenges. In this paper we describe our approach to Maximum Performance Computing - building applicationspecific computers which complement conventional x86 processors with high performance dataflow engines implemented on FPGA to provide 10-100x improvements in performance and performance/W. We describe the MaxCompiler programming system which allows software engineers to create dataflow engines optimized for their particular applications, and discuss an example application that has been accelerated using this methodology.

References

[1]
The green500 list.
[2]
Top 500 supercomputing sites.
[3]
O. Lindtjorn, R. G. Clapp, O. Pell, O. Mencer, M. J. Flynn, and H. Fu. Beyond traditional microprocessors for geoscience high-performance computing applications. IEEE MICRO, March/April 2011.
[4]
W. Liu et al. Anisotropic reverse-time migration using co-processors. SEG Expanded Abstracts, 28, 2009.
[5]
P. Marchetti, D. Oriato, O. Pell, A. Cristini, and D. Theis. Fast 3D ZO CRS stack - FPGA implementation of an optimization based on the simultaneous estimate of eight parameters. In 72nd EAGE Conference. EAGE, 2010.
[6]
T. Nemeth, J. Stefani, W. Liu, R. Dimond, O. Pell, and R. Ergas. An implementation of the acoustic wave equation on FPGAs. SEG Expanded Abstracts, 27, 2008.
[7]
S. Weston, J.-T. Marin, J. Spooner, O. Pell, and O. Mencer. Accelerating the computation of portfolios of tranched credit derivatives. In Workshop on High Performance Computational Finance. IEEE, 2010.
[8]
S. Weston, J. Spooner, S. Racaniere, and O. Mencer. Rapid computation of value and risk for derivatives portfolios. Concurrency and Computation: Practice and Experience, 2011 (to appear).

Cited By

View all
  • (2022)Applications and Techniques for Fast Machine Learning in ScienceFrontiers in Big Data10.3389/fdata.2022.7874215Online publication date: 12-Apr-2022
  • (2021)Systematically migrating an operational microphysics parameterisation to FPGA technology2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM51124.2021.00016(69-77)Online publication date: May-2021
  • (2020)UNILOGICACM Transactions on Reconfigurable Technology and Systems10.1145/340911513:4(1-32)Online publication date: 9-Sep-2020
  • Show More Cited By

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News  Volume 39, Issue 4
September 2011
116 pages
ISSN:0163-5964
DOI:10.1145/2082156
Issue’s Table of Contents

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 19 December 2011
Published in SIGARCH Volume 39, Issue 4

Check for updates

Qualifiers

  • Column

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)3
  • Downloads (Last 6 weeks)0
Reflects downloads up to 17 Feb 2025

Other Metrics

Citations

Cited By

View all
  • (2022)Applications and Techniques for Fast Machine Learning in ScienceFrontiers in Big Data10.3389/fdata.2022.7874215Online publication date: 12-Apr-2022
  • (2021)Systematically migrating an operational microphysics parameterisation to FPGA technology2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM51124.2021.00016(69-77)Online publication date: May-2021
  • (2020)UNILOGICACM Transactions on Reconfigurable Technology and Systems10.1145/340911513:4(1-32)Online publication date: 9-Sep-2020
  • (2019)VHDL vs. SystemC: Design of Highly Parameterizable Artificial Neural NetworksIEICE Transactions on Information and Systems10.1587/transinf.2018EDP7142E102.D:3(512-521)Online publication date: 1-Mar-2019
  • (2019)First Steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa ArchitectureScientific Programming10.1155/2019/78078602019Online publication date: 13-Oct-2019
  • (2019)Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)10.1109/H2RC49586.2019.00010(34-41)Online publication date: Nov-2019
  • (2018)Memory and Communication Profiling for Accelerator-Based PlatformsIEEE Transactions on Computers10.1109/TC.2017.278522567:7(934-948)Online publication date: 1-Jul-2018
  • (2018)Addressing the Complexity of HPC in the Cloud: Emergence, Self-Organisation, Self-Management, and the Separation of ConcernsHeterogeneity, High Performance Computing, Self-Organization and the Cloud10.1007/978-3-319-76038-4_1(1-30)Online publication date: 19-May-2018
  • (2017)DFiant: A dataflow hardware description language2017 27th International Conference on Field Programmable Logic and Applications (FPL)10.23919/FPL.2017.8056858(1-4)Online publication date: Sep-2017
  • (2017)CYBERH: Cyber-Physical Systems in Health for Personalized Assistance2017 19th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC)10.1109/SYNASC.2017.00067(373-376)Online publication date: Sep-2017
  • Show More Cited By

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Figures

Tables

Media

Share

Share

Share this Publication link

Share on social media