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Breaking the power delivery wall using voltage stacking

Published: 03 May 2012 Publication History

Abstract

We propose the use of voltage stacking for addressing some of the power delivery issues for many-core processors. To demonstrate the effectiveness of our method we first design a proxy for a many-core stacked processor in the form of a regular structure using multiple ring oscillators where we can control the voltage, frequency and switching activity for individual rings. For intermediate voltage rail regulation, we propose a push pull-based switched capacitor regulator designed specifically for balancing the stacked loads. Detailed Spice simulation results for the prototype model show a 4× reduction in supply current when using 4 layers of voltage stacking. We further validate our method by designing a voltage-stacked structure using two PIC cores.

References

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P. Jain et al "A multi-story power delivery technique for 3D integrated circuits," ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 57--62, 2008.
[2]
S. Rajapandian at al "High voltage power delivery through charge recycling," IEEE Journal of Solid State Circuits, 41(6):1400--1410, 2006.
[3]
A. Cabe and M. R. Stan "Experimental Demonstration of Standby Power Reduction using Voltage Stacking in an 8Kb Embedded FDSOI SRAM", ACM Great Lakes Symposium on VLSI, 2011
[4]
J.Ju and C. H. Kim, "Multi-Story Power delivery technique for Supply Noise Reduction and Low Voltage Operation," ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 192--197, Aug 2005.
[5]
International Technology Roadmap for Semiconductors 2009
[6]
Zhiyi Yu et al, "AsAP: An Asynchronous Array of Simple Processors", IEEE Journal of Solid State Circuits, 2007.
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S. Wooters, B. Calhoun and T. Blalock, "An energy efficient subthreshold level converter in 130 nm CMOS", IEEE TCAS II, Vol 57, issue 4, April 2010.
[8]
Y. K. Ramadass and A. P. Chandrakasan. "Voltage scalable switched capacitor DC-DC converter for ultra-low power on-chip applications" in IEEE Power Elec. Specialists Conf., June 2007.

Cited By

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  • (2020)Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power ManagementIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.296960739:12(5142-5155)Online publication date: Dec-2020
  • (2019)Architecting Waferscale Processors - A GPU Case Study2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2019.00042(250-263)Online publication date: Feb-2019
  • (2018)Efficient and reliable power delivery in voltage-stacked manycore system with hybrid charge-recycling regulatorsProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196037(1-6)Online publication date: 24-Jun-2018
  • Show More Cited By

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        cover image ACM Conferences
        GLSVLSI '12: Proceedings of the great lakes symposium on VLSI
        May 2012
        388 pages
        ISBN:9781450312448
        DOI:10.1145/2206781
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        New York, NY, United States

        Publication History

        Published: 03 May 2012

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        Author Tags

        1. DC to DC conversion
        2. charge recycling
        3. many core
        4. switched capacitor
        5. voltage stacking

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        GLSVLSI '12: Great Lakes Symposium on VLSI 2012
        May 3 - 4, 2012
        Utah, Salt Lake City, USA

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        Overall Acceptance Rate 312 of 1,156 submissions, 27%

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        Cited By

        View all
        • (2020)Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power ManagementIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.296960739:12(5142-5155)Online publication date: Dec-2020
        • (2019)Architecting Waferscale Processors - A GPU Case Study2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2019.00042(250-263)Online publication date: Feb-2019
        • (2018)Efficient and reliable power delivery in voltage-stacked manycore system with hybrid charge-recycling regulatorsProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196037(1-6)Online publication date: 24-Jun-2018
        • (2018)Voltage-stacked GPUsProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00039(390-402)Online publication date: 20-Oct-2018
        • (2018)Efficient and Reliable Power Delivery in Voltage-Stacked Manycore System with Hybrid Charge-Recycling Regulators2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)10.1109/DAC.2018.8465914(1-6)Online publication date: Jun-2018
        • (2016)Learning-Based Power/Performance Optimization for Many-Core Systems With Extended-Range Voltage/Frequency ScalingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.250433035:8(1318-1331)Online publication date: 1-Aug-2016
        • (2016)A Fully Integrated Reconfigurable Switched-Capacitor DC-DC Converter With Four Stacked Output Channels for Voltage Stacking ApplicationsIEEE Journal of Solid-State Circuits10.1109/JSSC.2016.258059851:9(2142-2152)Online publication date: Sep-2016
        • (2015)A cross-layer design exploration of charge-recycled power-delivery in many-layer 3d-ICProceedings of the 52nd Annual Design Automation Conference10.1145/2744769.2744774(1-6)Online publication date: 7-Jun-2015
        • (2015)Transient voltage noise in charge-recycled power delivery networks for many-layer 3D-IC2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)10.1109/ISLPED.2015.7273506(152-158)Online publication date: Jul-2015
        • (2014)On hyperbolic laws of capacitor discharge through self‐timed digital loadsInternational Journal of Circuit Theory and Applications10.1002/cta.201043:10(1243-1262)Online publication date: Aug-2014
        • Show More Cited By

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