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Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs

Published: 03 June 2012 Publication History

Abstract

Due to the large geometry of through-silicon-vias (TSVs) and their connections to the power grid, significant current crowding can occur in 3D ICs. Prior works model TSVs and power wire segments as single resistors, which cannot capture the detailed current distribution and may miss trouble spots associated with current crowding. This paper studies DC current crowding and its impact on 3D power integrity. First, we explore the current density distribution within a TSV and its power wire connections. Second, we build and validate effective TSV models for current density distributions. Finally, these models are integrated with global power wires for detailed chip-scale power grid analysis.

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Cited By

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  • (2024)Physics-Informed Learning Based Multiphysics Simulation for Fast Transient TSV Electromigration AnalysisACM Transactions on Design Automation of Electronic Systems10.1145/370610630:2(1-22)Online publication date: 29-Nov-2024
  • (2020)Three-dimensional Simulation of Effects of Electro-Thermo-Mechanical Multi-physical Fields on Cu Protrusion and Performance of Micro-bump Joints in TSVs Based High Bandwidth Memory (HBM) Structures2020 IEEE 70th Electronic Components and Technology Conference (ECTC)10.1109/ECTC32862.2020.00260(1659-1664)Online publication date: Jun-2020
  • (2017)Leveraging recovery effect to reduce electromigration degradation in power/ground TSVProceedings of the 36th International Conference on Computer-Aided Design10.5555/3199700.3199809(811-818)Online publication date: 13-Nov-2017
  • Show More Cited By

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  1. Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs

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    cover image ACM Conferences
    DAC '12: Proceedings of the 49th Annual Design Automation Conference
    June 2012
    1357 pages
    ISBN:9781450311991
    DOI:10.1145/2228360
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 03 June 2012

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    Author Tags

    1. 3D IC
    2. DC current crowding
    3. TSV
    4. power integrity
    5. reliability

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    DAC '12: The 49th Annual Design Automation Conference 2012
    June 3 - 7, 2012
    California, San Francisco

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    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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    Cited By

    View all
    • (2024)Physics-Informed Learning Based Multiphysics Simulation for Fast Transient TSV Electromigration AnalysisACM Transactions on Design Automation of Electronic Systems10.1145/370610630:2(1-22)Online publication date: 29-Nov-2024
    • (2020)Three-dimensional Simulation of Effects of Electro-Thermo-Mechanical Multi-physical Fields on Cu Protrusion and Performance of Micro-bump Joints in TSVs Based High Bandwidth Memory (HBM) Structures2020 IEEE 70th Electronic Components and Technology Conference (ECTC)10.1109/ECTC32862.2020.00260(1659-1664)Online publication date: Jun-2020
    • (2017)Leveraging recovery effect to reduce electromigration degradation in power/ground TSVProceedings of the 36th International Conference on Computer-Aided Design10.5555/3199700.3199809(811-818)Online publication date: 13-Nov-2017
    • (2017)TSV-Based 3-D ICs: Design Methods and ToolsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.266660436:10(1593-1619)Online publication date: Oct-2017
    • (2017)Leveraging recovery effect to reduce electromigration degradation in power/ground TSV2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2017.8203861(811-818)Online publication date: Nov-2017
    • (2015)Modeling and Layout Optimization for Tapered TSVsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2014.238404223:12(3129-3132)Online publication date: Dec-2015
    • (2014)Novel Through-Silicon-Via Inductor-Based On-Chip DC-DC Converter Designs in 3D ICsACM Journal on Emerging Technologies in Computing Systems10.1145/263748111:2(1-14)Online publication date: 18-Nov-2014
    • (2014)TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D ICCommunications of the ACM10.1145/249453657:1(107-115)Online publication date: 1-Jan-2014
    • (2014)"Green" On-chip Inductors in Three-Dimensional Integrated CircuitsProceedings of the 2014 IEEE Computer Society Annual Symposium on VLSI10.1109/ISVLSI.2014.117(571-576)Online publication date: 9-Jul-2014
    • (2013)Transient modeling of TSV-wire electromigration and lifetime analysis of power distribution network for 3D ICsProceedings of the International Conference on Computer-Aided Design10.5555/2561828.2561902(363-370)Online publication date: 18-Nov-2013
    • Show More Cited By

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